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BQ28Z610: How to understand what triggered the Permanent Fail from PF Status in data memory?

Part Number: BQ28Z610

Hello,

this question is pretty urgent because we have several battery packs with the same behavior; all they are in PF status with DFETF set but testing the board, the MOSFET appears not damaged and there are no further way to drawn current in discharge if the DSG FET is open. The CHG & DSG FET is the CSD87313.

I would like to say that sometime we face the same problem during the test post-assembly of the cell to the board, but they are due the not correct handling of the boards after testing.

When the issue arrives from closed batteries that have already worked on field long times, 200 cycles or more, I do not know how to understand what has triggered the PF while the DSG FET is not damaged.

Another strange situation is that the packs shows RemainCapacity and FullCharge Capacity both 0 mA but the RSoC is 100%. I attach the .gg.csv file from one of those packs.

Thank you for explanation.

PS: what are the events that trig the SS bit? Are they the same or different from events which trig the PF bit?

/cfs-file/__key/communityserver-discussions-components-files/196/1s3p-_2D00_-PF-set.gg.zip

  • When a PF happens the dataflash is written once and then the pack is disabled. That means no further writes to df are possible. Thus, the PF status captures the state of the gauge when the PF happened. Looking at your gg file, you had SS set because you had CUV happen at that time. However, the cell voltages don't indicate that. Your gauging state also indicates that you were in relaxation. The df was also written when the current was -8mA. If you are in CUV your dsg FET would be off. Given that we see a negative current, my suspicion is that you had an ESD hit or stray current with the dsg fet. To the fw that looks like a dsg fet failure. That's why DFETF would have been triggered. One question, were your devices near high EMI areas like a walkie talkie or a high gain antenna? If yes, then your power circuit will need better shielding.

    If FCC=0 and RM=0, then fw calculates RM/FCC as 100%. As to why it is so, I can't tell you without having detailed logs. But all these point to some sort of ESD or EM when the gauge PF occurred.

  • Hello Batt,
    thanks for early reply and forgive me if I have to add something.
    I quite agree that EMI and ESD could explain the strange behavior but the battery are installed in portable terminals used for patrolling hazardous factories and patrol people are wearing antistatic clothes and are well trained against ESD.
    EMI are then more probable, but also here, it is unlikely that the power of the possible RF apparatus used in hazardous location is so high to affect the BQ28Z610 or its circuits; the BQ is well grounded to the reference GND plane. The board is put between the cells (2 cells over the bottom side of PCB, 1 cell over the top side) then those cells act like a minimal shield against RF.

    I will investigate more about EMI, but meantime let me to do not agree with the formula 0/0=1: it could be good for math but in engineering a quantity 0 cannot be intended at 100%: the 100% of 0 is still 0, then the indication of 100% is not correct in my opinion.
    About some parameters, I set the FC and FD like below:
    FC is set by Valid Charge Termination and cleared when RSoC is 95%
    FD is set by End Voltage and cleared when RSoC is 5%.
    Maybe that this setting will affect the general behavior , because the battery has both FC and FD set in the battery status register (while the PF Status Guuging Status reports only FC set).

    Another question I have in mind is: what about the AFE Regs of the PF Status? I have no way to understand them, just can guess some.
    And the last one: what happens at code level when the SW detects both Remaining Capacity and FullChargeCapacity at 0 mAh?

    I image that some replies are complex, but please let me to understand.
    Thanks
  • Hi Batt,
    first of all I have to ask to forgive me: the PF event was triggered by my tool to check why no output.
    I supposed to have powered the circuit from the pack but because of an unseen contact some current was drawn from cell while the BQ has already triggered the SS event (CUV). Then, because DSG FET was OPEN, the PF event was triggered. I am so sorry, but that contact happened after I had released the tool.

    Then the real issue is in the cell that has arrived at the end of life earlier than expected because the stringent environmental conditions and the request to use all the capacity as most as possible (that could charge the cell up to 4.25 V, lowering their life span).
    Then, if you can provide some information about the PF Status AFE Regs and, possibly, review the code to avoid that the RSoC is set at 100% when Remaining Capacity is 0 mAh, I will be happier.

    Thanks a lot......
  • Hi Maurizio,

    The PF AFE regs are internal registers that we are unable to discuss. The issue is when you have a PF, your RSOC doesn't really matter. Your FCC getting to zero is what is causing RSOC to jump to 100. That is a fw implementation of capacity. It cannot be changed.