UCD3138: UCD3138

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it seems like what you are doing is similar to this:
www.ti.com/.../slua644.pdf
Please read this application note to see if it helps.

Ian

I had reviewed this app note before but thanks for pointing out that our situation is similar.

Indeed!  The "inductor" we have does exactly produce a current waveform as shown in the Boshan work. Although for different reasons. Boost downslope is linear, ours is sinusoidal. Same with the negative side:ours is entirely sinusoidal.

So this is very exciting: that UCD3138 has means to handle such topological modes.

As shown in the waveforms, ours get a bit more involved: because we need to sense the downslope time of the current AND the negative duration. These determine the ON timing of the output  discharge  path( legacy uses diode) and the current rectifier( legacy uses diode)

These vary with line, load and during the entire sinusoid excursion.

It will be really powerful extension of the chip if we can produce these timings from inside once we feed the sensed currents.

The gating waveforms can be generated using multigate chips but will be more powerful if done inside 3138.

BYW: the downslope in our case is approx 1 usec. Negative current is approx 2 usec.

During negative line voltage, their roles reverse....as I pointed out in the post.

I will be eagerly waiting to hear more on this.

thnx much

if you can calculate the downslope time and the negative current duration, then UCD can generate the corresponding SYNC gate and discharge gate signals for you. Otherwise you have to use external circuit to do the job.

yes, this can be calculated: it is strange coincidence- the expression is very similar to Boshan paper..

But how about the delays in the circuit that might cause untimely SYNCH FET turn on ?

It is equally possible to feed current sensor data that gives when the timing starts & when it ends.

But let me look into the computed value vs delay impact.

thnx much

thnx Bosheng for the reminder.

Due to uncertainty of  delays, we changed out the GaN switches( with no natural commutating diode ) to MOSFET. Such that now there is no penalty due to delays as the MOSFET body diode will start conducting in ZCS mode. Although, computed delay times are <100ns.

Furthermore, we decided to extract the sync timing circuits outside of the UCD3138. Turns out, there is no impact at all in our topology.

r

Can someone list for me pl all the tools I need to get started on UCD3138?

I lost them all & cannot seem to locate them in TI either.

Appreciate documents on

-how to get started with UCD 3238 design

- code examples.

-training videos etc...

- what we must buy to launch the tools

I found only d/s of UCD3138 in my PC so far. 

thnx

you asked the same question in your another E2E post, please check answers in that post.

I am closing this post