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LMG1020: Datasheet Truth Table?

leon park
Prodigy 70 points
Part Number: LMG1020

I am thoroughly confused about the truth table and how it relates to the output pins. How are OUTH and TOUL independently controlled by IN+ and IN-? The block diagram shows output from the logic gate triggers both output pins, and their purpose is to be tied to resistors that control rise and fall time.

The datasheet goes on to illustrate how to create short pulses with IN+ and a delayed signal to IN- which I take to mean that there would be two states in the truth table in which there would be output on OUTH, yet it only shows one.

  • 0
    TI__Genius 12990 points
    Hi Leon,

    Thanks for your post on LMG1020, welcome to e2e!

    Let me try to help you out with this,
    1) IN- is like an 'ENABLE-not' so it enables the output when pulled low
    1a) it could also disable the output when pulled high (see #3)
    2) LMG1020 OUTH can only drive high if the IN- is pulled low and IN+ is driven high
    2a) OUTL will be low (or active) pulling the gate to GND as long as there is VDD applied and OUTH is not active
    3) If IN+ is pulsed then a delayed version of IN- can be used to create a pulse on the output
    3a) think of it as pulsing IN+ to make the output OUTH high and then pulsing a delayed version on IN- to make the output OUTL low.

    The difference is the input falling threshold is now internal to the device making the pulse width as short as LMG1020 minimum input pulse width spec will allow rather than relying on a 1ns input pulse which is difficult to produce. A high-speed controller like an FPGA is more likely to have the capability of using two inputs delayed from one another rather than 1ns pulse burst.

    does this make sense? I will be updating the datasheet to remove any possible confusion in the near future.
    are there any other misunderstandings from the datasheet I can update?
    care to share what your using LMG1020 for?
    thanks,
  • 0 in reply to Jeffrey Mueller
    Prodigy 70 points
    I completely misremembered Figure 10, I thought there was a peak between all four groups of the red dotted lines, but they appear only when IN+ is high and IN- is low, I mistakenly thought the negative case was also true. It now makes sense.

    Sorry.

    We are driving a GaN output switch, but I am having difficulty with the switch failing, while the LM1020 driver remains intact.