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BQ28Z610: VOK flag not cleared at end of fully charged(FC) relax phase -Learning Cycle

Shilpan Shah
Prodigy 80 points
Part Number: BQ28Z610
Other Parts Discussed in Thread: BQSTUDIO

Hello!

Currently I am running the learning cycle and noticing an issue during relax phase when the battery has fully charged. According to BQStudio, at the end of relax phase the VOK bit did not clear as expected.

Update status has changed to 0x05 and REST flag is set as expected during charged relax phase. 

According to learning cycle guide www.ti.com/.../slua848.pdf ,   

"The [VOK] bit in the IT status() register clears once the gauge has taken an OCV reading and qualified it for a Qmax update. The 2 hour wait time is a recommendation; the most accurate time is checking to determine when the [VOK] and [RDIS] bits are clear, which can occur sooner than 2 hours." 
After waiting for more than 12 hrs, the VOK flag has not cleared. Here is pic of bqstudios circling VOK flag remaining on. Not sure why it has not cleared yet. Any insight would be great. I have attached csv file for info. Thanks,
Shilpan
  • 0
    Prodigy 80 points

    * Texas Instruments Data Flash File
    * File created Tue Mar 05 11:14:28 2019
    *
    * Device Number 2610
    * Firmware Version 0.20
    * Build Number 25
    * Order Number 0
    *
    * bqz Device Number 2610
    * bqz Firmware Version 0.20
    * bqz Build Number 25
    *
    [Voltage(Calibration)]
    Cell Gain = 12101
    Pack Gain = 49669
    BAT Gain = 48936
    [Current(Calibration)]
    CC Gain = 1.036
    Capacity Gain = 1.036
    [Current Offset(Calibration)]
    CC Offset = 0
    Coulomb Counter Offset Samples = 64
    Board Offset = 0
    CC Auto Config = 03
    CC Auto Offset = 0
    [Temperature(Calibration)]
    Internal Temp Offset = 0
    External1 Temp Offset = 0
    [Internal Temp Model(Calibration)]
    Int Gain = -12143
    Int base offset = 6232
    Int Minimum AD = 0
    Int Maximum Temp = 6232
    [Cell Temperature Model(Calibration)]
    Coeff a1 = -11130
    Coeff a2 = 19142
    Coeff a3 = -19262
    Coeff a4 = 28203
    Coeff a5 = 892
    Coeff b1 = 328
    Coeff b2 = -605
    Coeff b3 = -2443
    Coeff b4 = 4696
    Rc0 = 11703
    Adc0 = 11703
    Rpad = 0
    Rint = 0
    [Current Deadband(Calibration)]
    Deadband = 3
    Coulomb Counter Deadband = 9
  • 0 in reply to Shilpan Shah
    Prodigy 80 points
    Is the VOK bit not clearing an issue for discharge phase or remaining portion of the learning cycle?
  • 0 in reply to Shilpan Shah
    TI__Mastermind 42535 points
    If your voltage is unstable or you don't meet the dV/dt condition, VOK will not clear. If it doesn't clear, complete your dsg and repeat the cycle again.
  • 0 in reply to Batt
    Prodigy 80 points
    Agreed but doesn't the FC flag indicate that its fully charged and the voltage is stable?
  • 0 in reply to Shilpan Shah
    TI__Mastermind 42535 points
    FC has nothing to do with voltage stability. I'm talking about a 4uV/s drift which is what we use to calculate a stable OCV.
  • 0 in reply to Batt
    Prodigy 80 points
    So how do we prevent voltage instability and so that it meets the dV/dt condition for OCV readings.
  • 0 in reply to Shilpan Shah
    TI__Mastermind 42535 points
    You can disconnect the charger at the end of charge of have CHGFET turn off on chg termination by setting FET Options, CHGFET bit.