TPS25940-Q1: State of diagnostic outputs when device EN is low

Jared Becker

Part Number: TPS25940-Q1

Hi Team,

If the diagnostic outputs (/FLT, PGOOD) are not tied to OUT, but instead tied to a different voltage level to interface with a processor, what is the state of those internal FETs when the device EN is low? Is it possible that there could be leakage current through the pull-up resistor to ground through these FETs?

Thank you for your support.

Jared

over 6 years ago

0 Rakesh over 6 years ago

TI__Guru** 105361 points

Hi Jared,

When EN=LOW, the status of PGOOD and /FLT will be LOW.
In open drain condition, the leakage current through these pins will be max 1uA.

Best Regards,
Rakesh

0 Jared Becker over 6 years ago in reply to Rakesh

TI__Genius 11845 points

Hi Rakesh,

If the status of PGOOD and /FLT are LOW, wouldn't that mean that the FETs are turned on a current can flow to ground to create zero volts at the output of PGOOD and /FLT? Therefore, wouldn't the leakage current be dependent upon the size of the pull up?

Thanks,
Jared

0 Rakesh over 6 years ago in reply to Jared Becker

TI__Guru** 105361 points

Hi Jared,

We term that as sink current and it depends on external pull up resistor + pull up source.
The sink current (=pull up voltage / pull up resistor) should be less than 10mA max.

Best Regards,
Rakesh

0 Jared Becker over 6 years ago in reply to Rakesh

TI__Genius 11845 points

Hi Rakesh,

Ok, to be clear, when the device EN pin is LOW, these FETs allow current to flow to ground, correct?

-Jared

0 Rakesh over 6 years ago in reply to Jared Becker

TI__Guru** 105361 points

Hi Jared,

Correct. When EN pin is LOW, these FETs turns ON and allow current to ground.

Best Regards,
Rakesh

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TPS25940-Q1: State of diagnostic outputs when device EN is low