TINA/Spice/LM5164: Start-up into heavy capacative load

Thanks David,

Okay, good to know. In fact this would be an infrequent event, occurring only during initial startup. I needed an even larger output cap on the LM5164 around 8000uF. Unfortunately I am designing a battery / mains powered system and should the battery suddenly be replaced by mains power I can see the Vin jump very rapidly from as low as 42V up to 62V. This in itself is not a problem for the LM5164, but the switcher does require an input capacitor and this must be charged from the transient supply voltage. Therefore in order to avoid overheating the pass FET directly from the input supply voltage, I have required to implement some simple dv/dt control here. There is a surprising amount of energy in even such a small 4.6uF capacitor when its charged to 60V. Therefore when the voltage steps up, I am forced to briefly switch off the LM5164, as I bring its input cap up to the new voltage. (I could have left the LM5164 on during this change, but its current draw changes with supply voltage and at low voltages it can be pulling over 0.5A, through the pass FET which has over 55V across it...ouch). During this brief off time, the output from the LM5164 which is driving a series of LDOs must have just enough capacitance to ensure the LDOs do not drop out before the LM5164 has switched back on again. Hence the large capacitance.

I'm glad you sound confident about the power dissipation in the LM5164, I tried in fact to modify its spice model and replaced the VSWITCH elements that are rather roughly simulating the NMOS devices with actual NMOS simulations, with the aim of actually getting some thermal data from the model. However it proved tricky and I finally gave up, having gleaned enough info to realise that switching losses seem to be quite small, but without a clear answer.

Anyway I further decided that due to the unknown element it would be safer to follow the LM5164, with a dv/dt controlled pass FET between the LM5164 and the LDOs. In fact I'm rather more happy about this as I have been able to double up its usage as a simple OV lockout directly in front of the LDOs. I'm much happier with this, as I have been burnt in the past with switchers that have suddenly failed short circuit, and with such large drop down ratios, this is always clearly a catastrophic failure mode; cascading through the LDOs and killing all the 3V3 systems. MCU, logic etc. So putting the pass FET between LM5164 and the low voltage elements gives me a sense of confidence and, as required current limits the initial start-up. Therefore also giving me confidence that the LM5164 will not go into thermal shutdown, in the 100mS or so it takes to get the output caps charged.

Thanks for you consideration

Aidan

Thanks again David,
I shall keep this all in mind. However, the primary issue I face is the sudden charging of the Input cap of the LM5164 when the voltage changes abruptly. This is a function of my input pass FET which I must have to protect against serious overvoltage occuring on the SMPS or indeed through stupid user action (or me for that matter :) )
So when this change occurs the current in this input FET can reach many 10's or more of amps, and it will surely kill it. If the step is large enough, so I decided better to temporarily isolate the load, get the input conditions steady under a known load and then re-enable the LM5164.

Still while I have your attention, perhaps you could clarify something for me. The soft start feature. I see the spice model implements this, but the datasheet seems a little lacking (or I cant read), about what exactly triggers a re-start of this SS period. Is this related to the device being in Shutdown versus Sleep mode. I see the only info in this regard refers to the q current of the device in sleep versus shutdown or active mode.
However if the output voltage is already high, and I shutdown the lm5164, then re-enable, and still have a output voltage which is just a fraction below the target value, will the SS feature actually allow the output cap to discharge still further, until SS has expired? Or is SS dependent on the output voltage being below the SS FB point adjustment, in the first place.
essentially I only want SS when the output caps are empty, but skip past SS, if I already have charged output caps.
Whats the deal?
Thanks
Aidan

Hi David,

Thanks, but still not entirely clear. Firstly is the discharge of the SS ramp entirely independent of the output voltage? I was hoping that it can only discharge to the voltage sitting on the FB pin and then ramp up from this point on restart.

This is not however what the TINA transient model does. I have attached an example whereby you can clearly see that even when the FB pin has a voltage of 500mV sitting on it, the SS process seems to have ramped up from zero. causing an extra delay in raising the output voltage.

Can you confirm please that the models behaviour is correct. This is important to my design, as I have a very limited time in which to re-enable the LM5164 before the input stage of my LDOs fall below the dropout level. 

If for example I can disable the LM5164, raise its input supply voltage then re-enable all within say for arguments sake, 1mS, then I could have the LM5164 back driving the low voltage line in just 1mS. However if the ramp then causes a further 3mS of delay as the model would suggest, this gives the input stage to the LDOs a full 4mS without being powered and the voltage will fall substantially lower.

Model.....reality?

Thanks

Aidan

SS_LM5164.tsc