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LMG3411R050: Reliably splitting a single PWM signal into two complementary PWM signals with dead time for GaN fet Half Bridge (600V)

Part Number: LMG3411R050
Other Parts Discussed in Thread: LMG1210


I was going through the article that was written on ti website about using a single pwm to control two GaN fets in a half bridge configuration with dead time here .

I also read that when using RC timed systems, we have to be careful about the degradation of capacitance over temperature and time. here

My application is in a home appliance that will go into widespread production. Even though temperature based degradation is not a concern for me (That being said, the temperature of the system can rise up to 60 deg C inside .).

But, I am wondering if aging due to time can, in fact, cause failures due to a gradual degradation of dead time and eventual shoot through events.

My questions are these to summarize :

How badly does aging due to time affect ceramic capacitors and should i be concerned while designing this board?

Are there any other reliable ways to have a complementary PWM with a single input?

How have the Ti Eval boards done so far in this setup so far?



  • Hi Tony,
    Thanks for your interest in the LMG3411. I'm an applications engineer in the high power drivers group and can help with your question.

    You are right to be concerned about aging effects of capacitors in your timing circuit, especially if using high dielectric value (class 2/class 3) capacitors. The article you linked covers the aging characteristics of these types of capacitors and how they degrade on a logarithmic scale. It does state in the 4th paragraph, however, that temperature compensating capacitors don't have aging characteristics. The most common temperature compensating capacitors are C0G/NP0 types.

    We highly recommend that you use these class 1 (C0G/NP0) dielectric capacitors for these sensitive timing circuits. These capacitors should be least affected by both temperature shift, and aging shift and should allow for your system to be tuned for the tightest possible deadtime. These should not shift significantly over time, temperature, or bias. If more confidence is needed, an RMS tolerance analysis is recommended to be performed.

    I haven't personally seen any other simple and reliable ways to generate complementary signals from single PWM, with precise deadtime control.

    I'll poll the team tomorrow about any other methods and how other EVMs accomplish this task.

    If this helped answer your question, could you please press the green button? If not, feel free to respond with further questions.

    Thanks and best regards,
  • Hi John,

    Thanks for your reply. That did help.

    If you can find out about how the evals are performing over time with this configuration and if there is any other way being implemented that would be great! 



  • Hi Tony,

    If you need a fixed (or adjustable) dead-time consider the gate driver LMG1210 (without the integrated FET). LMG1210 has an internal dead-time circuit that inputs a single input (using PWM pin) and outputs the high-side HO output when the PWM pin goes high. When PWM pin goes low the low-side will automatically output LO with the corresponding high-to-low dead-time. The DHL/DLH pins can control the high-to-low and low-to-high dead-time to very precise values by placing a low tolerance resistor to ground. The EN pin can be used to then EN the part. The dead-time can be programmed from 0.5ns to 20ns with 1.8Mohm to 20kohms respectively.
    let me know if you have any questions!

  • Hi Jeffery,

    I see that the driver is for 200V Volts. Are there any variants for high voltages?

  • Hi Tony,

    There are not any high voltage variants right now.