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TPS23880: SRAM Programming I2C issues

Part Number: TPS23880

I am having difficulties programming the SRAM on the TPS23880 device on my embedded board. It appears that the ACK from the 23880 gets missed periodically. (Usually about 2/3 of the way through programming the main SRAM code). Looking at the signal on the scope, it appears that the master I2C clock is ok, but the ACK doesn't appear. From the perspective of my firmware, the I2C driver stalls (times out) and needs to be reset. At the moment, I am not able to resolve whether this is a hardware issue (my pullup resistors are wrong), a driver issue (the clocking is quite right in my firmware) or something isn't quite right in the 23880.

This issue is easily detectable in my firmware's state machine for programming the SRAM. Consequently, if I could successfully restart the I2C programming sequence from the middle, I could recover and complete the process. Is there any way that I could back up to an address that I know I have successfully written, reset the beginning address and continue programming from that point? Also, can the SRAM be programmed by sending blocks of data bytes, or does it have to be programmed one byte at a time?

Any hints as to how to identify the root cause of my problem would also be greatly appreciated. Also, workarounds that get me up and running in the short run would helpful.

  • Hi user5823974,

    Can you send me your schematic for review and a waveform(including SCL and SDA) when you don't get an ACK? What's your I2C clock frequency? Have you tried to reduce the frequency?  Can you also take some measurement and make sure the I2C timing requirements(in datasheet) are met? Thanks.

    Best regards,

    Penny

  • The most relevant part of the schematic is shown below. The I2C lines come from pins 66 (clock) and 67 (i/o). The TPS23880 is the only device on the I2C bus.

    I'm running the clock at 50kHz. I have experimented with both slower and faster clock rates with minor differences in the occurrence of my problem. Note that I also started programming the SRAM in 32 byte blocks rather than one byte at a time. This improved the odds that it would program correctly, but still fails about 1 out of 3 or 4 tries.

    I will work on trying to analyze the timing and capture scope traces tomorrow.

    Thanks

  • user5823974,

    Have you been able to capture scope traces? Do you still require assistance from us?

    Thanks,
  • user5823974,

    Due to lack of a response for ~3 weeks, we will be closing this thread. Please reply if still requiring our assistance. A reply back will automatically reopen the thread.

    Thank you for considering PoE solutions from Texas Instruments,