• State Resolved
  • Locked Locked
  • Replies 3 replies
  • Subscribers 64 subscribers
  • Views 389 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TPS7A8300: PG functionality

Xavier Ramus
Expert 4950 points
Part Number: TPS7A8300

. If we connect Vcc to 5V reference (not output), and connect EN pin to ground. What’s the relationship between Vin and PG?

 

Can you help to confirm and fill below table? Thank you.

 

  • 0
    TI__Guru 55940 points

    Hi Xavier,

    The PG circuitry does requires some headroom in order to function properly. This headroom can be provided by either the Vin or Vbias rail for TPS7A8300. If there is not enough headroom, then the pulldown FET may not pulldown the PG rail.

    Vin Vbias Ven PG
    0 < Vin < Vuvlo Vbias < 3 V logic low PG will be logic low as long as there is enough headroom
    Vuvlo < Vin < 1.4 V Vbias < 3 V logic low PG will be logic low as long as there is enough headroom
    Vin > 1.4 V (any condition) logic low logic low
    (any condition) Vbias >  logic low logic low

    Very Respectfully,

    Ryan

  • 0 in reply to Ryan Eslinger
    TI__Prodigy 570 points
    hi, i'm not quite understand the word "headroom". another question is where is the Vbias?
    Anyway, can you help to confirm my below question?
    imagine a resistor connected between PG and a Vref (Vref has no relationship with Vin and Vout). when 0<Vin<Vuvlo, I think the controller could not start, so there is no voltage drive the Mosfet that connect to Vref. do you agree with me? PG should be logic high I think.
    in an extreme condition, Vin=1mV. no other input, there must be no energy to drive Mosfet which connect to PG. PG should be high.
    i'm very interested in this question. thank you very much.
  • 0 in reply to Anders Yang
    TI__Guru 55940 points
    Hi Anders,

    TPS7A8300 has a NMOS pass FET. As such, the internal circuitry will either be powered by Vin (after an internal charge pump) or Vbias.

    Yes, in the situation you describe PG could be equal to your pullup voltage Vref; however, it will depend on your input voltage. The lower your input voltage is, the more likely PG will be pulled up to Vref generating a false logic high.

    While the the PG circuit is not tested to the same extent as a Voltage Supervisor (we do not measure the POR voltage), the following document describes the same topic:

    www.ti.com/.../snva845.pdf

    Very Respectfully,
    Ryan