Dears:
There are some troubles about series communication between two Bq76pl455a-Q1 chips on the same board.According to the manual about BQ76PL455AQ1,I made the following configuration about series communication.But the expected result did not appear, I am also not sure if there is an communication between the two chips.Please help me to check the configuration,and if it is incorrect please show me how to insolve this problem,ecpecte your response,thanks!
Best Regards!
xiaoming GENG
const uint8_t PWRCONFIG[5]={0xf1,0x0f,0x80,0x55,0xa3};
/*configu for auto-address*/
//const uint8_t COMCONFIG[6]={0xf2,0x10,0x00,0xe0,0x32,0xf5};//Communication Configuration for auto_address125k
const uint8_t COMCONFIG[6]={0xf2,0x10,0x10,0xe0,0x3f,0x35};//Communication Configuration for auto_address250k
const uint8_t ADDR_SEL[5]={0xf1,0x0e,0x10,0x54,0x5f};// auto addressing to select address
const uint8_t AUTO_ADDRESS[5]={0xf1,0x0c,0x08,0x55,0x35};//auto_address mode
const uint8_t CONFIGADDR00[5]={0xf1,0x0a,0x00,0x57,0x53};//confige device 1 to address 0
const uint8_t CONFIGADDR01[5]={0xf1,0x0a,0x01,0x96,0x93};//confige device 2 to address 1
const uint8_t ReadAddress00[6]={0x81,0x00,0x0a,0x00,0x2e,0x9c};//read device 1 address
//const uint8_t ReadAddress00[6]={0x00,0x00,0x00,0x00,0x00,0x00};
const uint8_t ReadAddress01[6]={0x81,0x01,0x0a,0x00,0x7f,0x5c};//read device 1 address
const uint8_t HighSideCommDisable[7]={0x92,0x01,0x10,0x10,0x20,0xb5,0xfc};//disable high-side receiver on differential interface on top of stack
const uint8_t LowSideCommDisable[7]={0x92,0x00,0x10,0x10,0xc0,0xb5,0x88};//disable low-side trasmitter on differential interface on bottom of stack
/*CLEAR ALL FAULT*/
const uint8_t CLEAR_FALUT_SUM01[7]={0x92, 0x01, 0x52, 0xFF,0xC0, 0x58,0x50};//clear device01 fault,start at top
const uint8_t CLEAR_FALUT_SUM00[7]={0x92, 0x00, 0x52, 0xFF,0xC0, 0x59,0xAC};//clear device00 fault
/*broadcast configuration for AFE*/
const uint8_t SMPL_SLY1[5]={0xf1,0x3d,0x00,0x41,0x63};//initial sampling delay :no delay
const uint8_t Cell_CSPER[5]={0xf1,0x3e,0xbb,0x01,0xe0};//first voltage and internal sampling period :60us
const uint8_t AUX_SPER[8]={0xf4,0x3f,0xbb,0xbb,0xbb,0xbb,0x67,0x33};// first tempe sample period:60us
const uint8_t OVERSMPL[5]={0xf1,0x07,0x7b,0x13,0xe0};//oversampling rate 12.6us
const uint8_t NCHAN[5]={0xf1,0x0d,0x10,0x54,0xaf}; //16 cells
const uint8_t CHANNELS[8]={0xf4,0x03,0xff,0xff,0xff,0x00,0x10,0xa0};//all cell and AUX and both internal tempe channels
