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TPS563200: Selection of the MLCC-sizes for ripple and noise reductions

Part Number: TPS563200

Hello TI Experts,

I studied several articles about the choice of damping pulsation capacitors and did not understand what is a significant parameter when choosing a smoothing capacitor.

I can not understand the following:

1. Less ESL & ESR or does a higher capacitor value better affect ripple smoothing? That is, what is better physically for smoothing pulsations? Condenser with casing 0402(1005) or 1206(3216)? Based on the article of your colleagues, ESL & ESR decreases with the size of the capacitor case. https://training.ti.com/capacitor-selection-high-frequency-ripple

2. What is the critical or threshold value (for which it is better not to go) ESR for example for TPS563200DDCT?

3. In case there are several capacitors installed, for example 3 pieces each having a 30mOhm ESR. What will be the final ESR of these 3 capacitors? (30/3 = 10mOhm?)

4. What should be the size of a 0.1uF capacitor connected between VBST & SW terminals. Why is this size here?

5. The specification also states that filter capacitors at the input of the regulator. I understand that we are talking about 0.1uF type filter capacitors. What size should they have for a noise filter and why?

6. Does it make sense to install a filter capacitor at the end of the VOUT net of the regulator, for example 0.1uF? Or bypass will be useful only near the pins of the consumer?

 

I know that the specification for the TPS563200DDCT says about smoothing capacitors with size 1206 (3216) I want to understand why this particular size was chosen.

  • Hi Evgeniy,

    1. Less ESL & ESR or does a higher capacitor value better affect ripple smoothing? That is, what is better physically for smoothing pulsations? Condenser with casing 0402(1005) or 1206(3216)? Based on the article of your colleagues, ESL & ESR decreases with the size of the capacitor case. training.ti.com/capacitor-selection-high-frequency-ripple

    it depends on which kind of ripple you like to smooth. For low frequency or switching frequency ripple, big value bulk cap will help. For higher frequency noise, small value small size ceramic cap will help. Low ESL and ESR means higher self resonant frequency and lower impedance at high frequency. This is why small size ceramic is used to filter high frequency noise.

    2. What is the critical or threshold value (for which it is better not to go) ESR for example for TPS563200DDCT?

    TPS563200 is a DCAP2 device. It has internal ripple injection circuits so there is no need to have external Vout ripple created by output cap ESR. So there is no requirement on ESR for output cap.

    3. In case there are several capacitors installed, for example 3 pieces each having a 30mOhm ESR. What will be the final ESR of these 3 capacitors? (30/3 = 10mOhm?)

    It depends on how much capacitance each have. If the capacitance value of each are the same, then ESR equivalent is 10mohm. if not, you will need to use impedance of each cap to do parallel calculation. A smart way to calculate is to change series model to parallel model and calculate the parallel capacitance and resistance. Please refer to
    www.electronicdesign.com/.../determine-equivalent-esr-ripple-voltage-and-currents-unequal-capacitors-parallel

    4. What should be the size of a 0.1uF capacitor connected between VBST & SW terminals. Why is this size here?

    more than 10V 0603 or 0402. Small size, good cost and good enough capacitance

    5. The specification also states that filter capacitors at the input of the regulator. I understand that we are talking about 0.1uF type filter capacitors. What size should they have for a noise filter and why?

    0603 is good in general. Reason explained in Q1

    6. Does it make sense to install a filter capacitor at the end of the VOUT net of the regulator, for example 0.1uF? Or bypass will be useful only near the pins of the consumer?

    Both Vout and consumer side should have this filter cap. The noise could from parastic of inductor, output cap and PCB trace. It is better to place filter at the place where you will be careful for ripple and EMI. Thanks!
  • Hello Anthony,

    Thank you for your replies.

    1. Accepted.
    2. The problem is that I am afraid, but at the same time I want to use polymer capacitors. In connection with your answer # 3 in this topic e2e.ti.com/.../779113. You said that using them can increase pulsations. How to understand how critical pulsations will be at ESR values ​​of 15mOhm (3 x SP-Cap (22 uF - 45mOhm))? I used the formula for calculating from Equation 3 www.ti.com/.../slva874.pdf. I did not understand that the value should be substituted in "Equation 5 & 6" as a parameter "j". Nowhere has it been said about this parameter and what it means - please explain. I used j = 3 (I suspect what is meant by the current density (A) at 1 millimeter) in my calculations.

    Please check my calculations.
    My vars:
    Vin = 12V
    Vout = 5V
    Fsw = 650kHz
    L1 = 3.3uH

    Iripple = (5 / (12 * 650000)) * ((12 - 5) / (3,3 * 0,000001)) = 1,3597513597513597513597513597514

    z1(Fsw,j) = 0,045 + (1 / (6,28318530718 * 0,000022 * 650000 * 3)) + 6,28318530718 * (5 * 0,0000000001) * 650000 * 3 = 0,05483601110787776948967448538787
    z2(Fsw,j) = 0,045 + (1 / (6,28318530718 * 0,000022 * 650000 * 3)) + 6,28318530718 * (5 * 0,0000000001) * 650000 * 3 = 0,05483601110787776948967448538787
    z3(Fsw,j) = 0,045 + (1 / (6,28318530718 * 0,000022 * 650000 * 3)) + 6,28318530718 * (5 * 0,0000000001) * 650000 * 3 = 0,05483601110787776948967448538787

    Zout_eq (Fsw) = ((1 / 0,054) + (1 / 0,054) + (1 / 0,054)) ^ (0 - 1) = 0,018

    Vpp = Iripple * Zout_eq (Fsw) = 1,359 * 0,018 = 0,024462 (24mV)

    New questions:
    a. Are my calculations correct?
    b. The specification indicates output pulsations at a level of 20mV. Will this have a negative effect on the stability / performance of the converter workflows?
    c. Why doesn't the "Equation 7" example contain the second part of the expression? (2Pi * ESL3 * Fsw * j). Because MLCC capacitors have minimal ESL parameter? (therefore it does not count)? Or because the ESL values of the last capacitor should not be taken in the calculations? Or is it just a documentation error?
    d. Do I correctly believe that a higher ESL value causes more ripples?
    e. Does the scenario with ESR apply from question Q3. To the ESL parameter? Explanation: Does ESL also decrease as ESR 3 times with 3 capacitors with the same capacity? Or there is no such thing as a common ESL, as in the situation with ESR 10mOhm.

    3. Accepted.
    4. Accepted.
    5. Accepted.
    6. Accepted.

  • a. Are my calculations correct?

    I think you are right to use equations to calculate z1, z2 and z3 but i don't think it is right to use Zout_eq (Fsw) to calculate Vpp. Plase refer to below link file page 11 and use the excel tool to calculate
    training.ti.com/.../Not All Regulators Are Created Equal - Caps and Noise.pptx

    b. The specification indicates output pulsations at a level of 20mV. Will this have a negative effect on the stability / performance of the converter workflows?

    No

    c. Why doesn't the "Equation 7" example contain the second part of the expression? (2Pi * ESL3 * Fsw * j). Because MLCC capacitors have minimal ESL parameter? (therefore it does not count)? Or because the ESL values of the last capacitor should not be taken in the calculations? Or is it just a documentation error?

    ESL is very small to neglect

    d. Do I correctly believe that a higher ESL value causes more ripples?

    It will cause high frequency noise which will add up ripple.

    e. Does the scenario with ESR apply from question Q3. To the ESL parameter? Explanation: Does ESL also decrease as ESR 3 times with 3 capacitors with the same capacity? Or there is no such thing as a common ESL, as in the situation with ESR 10mOhm.

    Yes, it also applies to ESR if three caps are same.