• State Resolved
  • Locked Locked
  • Replies 6 replies
  • Answers 1 answer
  • Subscribers 64 subscribers
  • Views 873 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

BQ25895: Why soft start time is related to configuration of D+ D-?

Howard Zou
Genius 12365 points
Part Number: BQ25895

Hi

my customer test on our EVM with 5V DC source, no battery, no load on VSYS.

When D+ D- floating, the SYS will reach VSYSMIN about 0.78s later than VBUS reaches 5V. Shown below: (red-VBUS, yellow- VSYS)

When D+ D- shorted, the SYS will reach VSYSMIN about 2.75s later than VBUS reaches 5V. Shown below: (red-VBUS, yellow- VSYS)

This should not be related to the process of INPUT SOURCE TYPE DETECTION because both converter started switching about 258ms later than VBUS reaches 5V shown below which means the INPUT SOURCE TYPE DETECTION finished within 258ms.

So the question is: 

1. Why different D+ D- configuration lead to such a big difference of soft start time?

2. Which configuration can minimize the time?

  • 0
    TI__Guru**** 166896 points
    Howard,

    In your first plot, did you mean to caption with "D+/D- shorted" not floating? If so, then D+/D- shorted, results in maximum input current limit while D+/D- floating results in 500mA current limit. At startup, the charger has a short start circuit. If that circuit is clamped to 500mA, then the SYS rise time at startup will be longer.

    Regards,
    Jeff
  • 0 in reply to Jeff F
    TI__Genius 12365 points

    Jeff,

    It's D+D- shorted which will lead to longer soft start time, not the other way around.

    And the input current limit should be neither 500mA nor 3.25A during soft-start period.

    According to the datasheet: When the system rail is below 2.2 V, the input current limit is forced to the lower of 200 mA or IINLIM register setting.

    So in fact no matter how D+ D- is configured, the input current limit should be the same as 200mA.

    But when D+ D- shorted, the (soft start time + input source type detection time) is much longer than when D+ D- floated. And the difference is caused only by soft start time, not input source type detection time.

    It happens on our EVM and it's not explainable, we want to know what kind of configuration of D+ D- could minimize the soft-start time.

  • 0 in reply to Howard Zou
    TI__Guru**** 166896 points
    Howard,

    Soft start continues until VSYS=2.2V. Input source detection times are different if D+/D- is shorted or floating. With HVDCP enabled, DCP detection can be as long as 2s. Can you repeat the measurements and show the INT pulses and SW node? The first INT pulse shows poor source detection complete, the second pulse shows input detection complete and the third shows VINDPM complete if relative VINDPM on.

    The shortest detection time is USB BCP1.2 SDP (~250ms startup time + ~80ms). Can your customer add resistors on D+/D- to simulate an SDP port? This will limit input current limit to 500mA after soft start.

    Regards,
    Jeff
  • 0 in reply to Jeff F
    TI__Guru 57721 points

    Howard,

    1.The startup is dependent on the input detection time. The converter always starts after the input detection is complete

    2. SDP has relative faster startup time.

    Thanks,

    Ning.

  • 0 in reply to Jeff F
    TI__Genius 12365 points
    Jeff,
    I want to confirm that we can still change IINLIM to a larger value like 2A with software after simulating SDP port, right?
  • 0 in reply to Howard Zou
    TI__Guru**** 166896 points

    Howard,

    Yes.  You can change the IINDPM via I2C after input source detection completes. 

    Regards

    Jeff