About power consumption of TMS320C5515

Hi,

Thanks for your post. Due to the Easter Holiday in the US, we will not be able to get back to you until early next week. We're sorry for the delay.

Hi 

Please see if you are able to split out the power consumption to see whether you are seeing higher than expect power on core or IO. 

I would strongly encourage that you refer to the following  application note

http://www.ti.com/lit/an/sprac07/sprac07.pdf

Usually IO termination is important, and if not done properly can cause a higher than expected power.

Hope this helps.

Regards

Mukul 

Hi Mukul
Thanks for your help. The document is very useful.

Based on the requirements. Our device will run in 60Hz continuously, and CPU should be active at all the time. But in order to analyze the problem, I put set CPU into idle at end of program, and try our best to reduce the current before it works.

When I run the following code(copied from the example code of sprac07.pdf). Device current is 19.6mA. It is quite different from 3.192mA according to C55xx_PowerSpreadsheet_RevB.xlsm.
Another information for you. When I run the device in RTC-ONLY model, the current is 0.03mA. Does it mean that hardware design has no problem, there is almost no current leakage.

However RTC-ONLY model is just for test. The device should run continuously. So, could you find the some problem in my code? or give me some suggestion.

Thanks a lot.

please refer to following code.
///////////////////
void main()
{
Uint16 data;
Uint32 i;
Uint16 temp;
Uint16 clk_stop_ack = 0;

// set 60Hz for PLL, the function is implemented in Csl_pll_example.c from TI.
pll_sample();

// LDO from 1.3V to 1.05V
*(ioport volatile unsigned *)0x7004 = 0x0002;
data = *(ioport volatile unsigned *)0x7004;
printf("%u\n", data);

//Request to stop the UART and EMIF clock
temp = *(ioport volatile unsigned int *)CLKSTOP;
*(ioport volatile unsigned int *)CLKSTOP = temp | 0x0011;
//Check if the two STOPPING requests have been granted by reading the CLKSTOP register
while (clk_stop_ack != 0x0022){
temp = *(ioport volatile unsigned int *)CLKSTOP;
clk_stop_ack = temp & 0x0022;
}

*(ioport volatile unsigned int *)PCGCR1 = 0x7FFF;
*(ioport volatile unsigned int *)PCGCR2 = 0x007F;

for (i=0; i<100; i++); //add extra software delay

IRQ_clearAll();

*(ioport volatile unsigned int *)ICR = 0x03EF; // Request to disable ports & C55x CPU
//add 6 "nop" clearing pipeline
asm (" nop");
asm (" nop");
asm (" nop");
asm (" nop");
asm (" nop");
asm (" nop");

asm (" idle"); //idle the CPU
}

Thanks for the additional clarifications. I will refer this post to my colleague who is more a subject matter expert on this , but currently out of office.
I think we should try to figure out why your idle power consumption is higher than expected. I still suspect IO tie off issues - are you able to confirm if the power is higher on the core/CVDD or the IOs/DVDD?

Regards
Mukul