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BQ25713: BATDRV switching time

Shinya Sawamoto
Expert 5285 points
Part Number: BQ25713

Hello,

I'd like to know how to calculate the switching time of BATDRV output voltage, external PFET gate from high to low.
I can find Rbatdrv_off=1.2kohm on the datasheet and guessed it may be calculated by this 1.2kohm and Ciss of the PFET, is it correct?

When the VBUS input is removed suddenly with pulling the system load, the supply should be switched to supplement mode. During the transition, the body diode on the BATFET can help suppling to the load and the voltage drop on the system can be clamped by the Vf, is this understanding also correct?

Thanks in advance,
S.Sawamoto

  • 0
    TI__Expert 5330 points
    Hi Shinya,

    The Gate-to-Source behavior of a FET has capacitive behavior, but if you look at the VI curve of a FET turning on, it does not look the same as a similar curve for a charging capacitor. FETs tend to quickly charge to a plateau voltage (you can search "Miller Plateau" for more information), remain near that plateau voltage even as current continues to drive into the gate, and then after a period of plateau quickly charge the rest of the way to whatever voltage they are being pulled up to.

    In order to properly model the turn-on time of the FET, you would need to model this VI curve, then determine the drive current by
    I_DRV = (V_DRV - V_GS) / 1.2 kOhm, where V_DRV = 6V for this device.

    A common estimation is to use the plateau voltage for V_GS as a constant value, then you can determine a constant drive current, i.e.
    I_DRV ~ (6V - V_PLAT) / 1.2 kOhm

    Once you have this current drive estimate, you can use the gate charge to determine the time required to drive the gate with
    t = Q_G / I_DRV

    Both the gate charge and plateau voltage should be specified on the FET datasheet.

    Regarding your second question, you are correct that the body diode of the PFET will allow the battery to discharge to hold up the system voltage even as the PFET is being turned on. As a result, the system should remain close to V_BATT - V_f, where V-f is the forward voltage drop across the backgate diode. Once the PFET turns on, the system voltage will move to V_BATT - R_DSON*I_BATT.


    Regards,
    Steve