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TPS2373: Current limit operation

T Kishi
Genius 4425 points
Part Number: TPS2373

Hi

My customer has question.

Customers evaluated the over current control of TPS2373.
customer confirmed that current limit was achieved at about 2 A, but the PG pin did not go low.
→ Is this behavior correct?

In addition, transient loss occurs when the voltage drops.
Does it cause internal FET damage?
Please refer to the attached file for details.

TPS2373.pdf

Regard

T Kishi

  • 0
    TI__Intellectual 1005 points
    Hello,

    The PG is only asserted "low" during the inrush phase. Going into current limit doesn't affect the PG.

    When the input voltage goes below the PoE PD UVLO (~35V) the RTN to VSS will disconnect. It will not cause internal FET damage. I don't quite follow your comment about "transient loss occurs when the voltage drop". Which voltage is "dropping" in the waveform. Ch1 (VDD) seems pretty steady...

    -Artem
  • 0 in reply to Artem Rogachev
    Genius 4425 points

    Hi Artem

    Thank you dor reply.

    I added a block at the time of measurement.
    Please check this.

    Is UVLO detected at a voltage between VDD and RTN?
    In the waveform, 48V is stable, but the voltage of "VDD-RTN" has dropped to about 30V.
    Please see the attached document.
    A new Vss-RTN voltage waveform was measured.
    a potential difference is generated between "RTN-VSS".
    However, current continues to flow, is there a problem with the internal FET?

    1667.TPS2373.pdf

    Regard

    T Kishi

  • 0 in reply to T Kishi
    TI__Intellectual 1005 points
    You are right that VDD to VSS is steady so a VDD UVLO is unlikely.

    You are operating pretty close the current limit (2.2A nominal; 1.9A min) so you may be hitting that. If you hit current limit you can expect to see voltage across RTN to VSS, while conducting current. This will then result in the VDD to RTN voltage going down, which will likely make the DC/DC hit it's UVLO and shut off.

    What exactly is the test condition causing this issue? Are you gradually increasing the load current or is it just operating normally and then shut off all of a sudden?

    Either way you're drawing way too much current. Per IEEE standard the PD shouldn't draw more than 71W and you're drawing ~2A*50V = 100W!
  • 0 in reply to Artem Rogachev
    Genius 4425 points

    Hi Artem

    Customers use electronic loads to gradually increase the load current to see if over-current protection works.
    Customer do not intend to actually flow such a current.
    Customer expected an operation to shut off the output by turning off the internal FET (between VSS and RTN) after detecting the overcurrent protection.
    It is the operation checked in that.
    Is this not working properly as a device?

    Regard

    T Kishi

  • 0 in reply to T Kishi
    TI__Mastermind 41770 points
    Hi T Kishi,

    The TPS2373 will foldback when the current limit is reached. So I expect VDD-RTN to drop. Then if the load increases such that the voltage between RTN-VSS reaches the foldback threshold of the datasheet, then the PD will go into inrush current limit (then PG goes LOW). The behavior looks okay.
  • 0 in reply to Darwin Fernandez
    Genius 4425 points
    Hi Darwin

    Thank you for reply.

    In the attached document (1667. TPS2373. Pdf) I have about 14 V of voltage between VSS and RTN.
    However, the current flowing to VSS remains 2.2A.
    In this case, I think that the loss that occurs with the Hot Swap FET between VSS and RTN will be about 30 W. Is it still no problem?
    Is my understanding wrong?

    Regard
    T Kishi
  • 0 in reply to T Kishi
    TI__Mastermind 41770 points
    Hi T Kishi,

    If the IC itself is dissipating 30W then the IC should hit thermal shutdown (protection). But looking at the waveform it looks like the VSS current drops down when the VDD-RTN waveform drops. This waveform looks like the PD is hitting current limit. The PD in current limit will foldback (VDD-RTN) will drop. If the VDD-RTN goes below the UVLO of the PWM controller, then it will stop switching and output of DCDC will drop.