UCC27201A: Gate driver failures

John Lintern40

Part Number: UCC27201A

Using the Automotive 1-kW 48-V BLDC Motor Drive Reference Design (TID-00281) as a reference, I have used the same circuit for the gate drivers and H-Bridge to design my own PCB for a 2 phase BLDC 48V motor.

During testing, 3 gate drivers (UCC27201A) have failed on 5 boards. The gate drivers are supplied with 12V using an isolated DC-DC converter with a 500mA output (Traco TEN 6-2412WIN).

When the gate driver fails, the 12V supply of the DC-DC converter is pulled down to a few volts, the failed gate driver seems to overload the 12V supply.

To find the faulty gate driver, I measure the resistance across the GATE and SOURCE of each MOSFET.

The resistance should be around 10k, which is the resistor across the GATE and SOURCE of each MOSFET.

However, where the gate drivers fail the GATE and SOURCE resistance is much lower (between 10R to 100R).

When I remove the faulty gate driver from the board, the output of the DC-DC converter returns back to 12V.

The gate driver failures are random and have failed for:

Phase A or phase B
Limb A or limb B
Top or bottom switch

What would cause these gate drivers to fail ? Other than the PCB layout, the circuit is the same as the TI reference design.

If the answer is not obvious, then how do I go about diagnosing what causes them to fail ?

Attached is a PDF for the schematic and PCB layout (4 layer, 3oz copper on all layers).

I have omitted the schematic and PCB design for the 48V filtering, DC link capacitors, 12V filtering etc as the circuit is the same as the reference design.

Other than the PCB layout, the only difference between the TI reference design and my design is:

Traco DC-DC converter used for 12V isolated supply (I needed higher current to supply a control board)
2 phase (four full H-bridges) instead of 3 phase (3 limbs)
Equivalent through hole MOSFET instead of surface mount

48V_TI_forum.pdf

over 5 years ago

0 Richard Herring over 5 years ago

TI__Mastermind 21915 points

Hello John,

Thank you for the interest in the UCC27201A half bridge driver. I am an AE supporting this product and will work to resolve your concerns. I do have some questions and will need more details to provide the best advice.

It sounds like from your description that there is possible damage to the driver output stage, and maybe relating to VDD. Can you comment on if the drivers that fail, is it the LO output that is affected or HO output, or maybe both.

Possible causes of driver output stage damage can be from driver output voltage overshoot or undershoot. Another possible cause may be VDD or HB-HS voltage transients exceeding the device rating. Also if there is excessive high frequency noise on the LI and HI inputs during power train switching, there may be false triggering of the driver output. Excessive driver output high frequency oscillations can stress the device.

During layout review I have a couple of comments. The component placement is close to the IC which is good compared to many motor drive designs. I see that the VDD bypassing routing can be improved considerably regarding the VSS trace connection. If the VDD caps can be moved to the left, the VSS connection could be made directly to the driver power pad and pin 7. There does look like a good (low inductance) ground plane on the bottom layer however. We usually recommend that the power train switch node trace have minimum overlap over the ground or DC input. This is to minimize the switch node parasitic capacitance. I see the switch node is a large plane. May be reduce the size to be a large trace width connection instead of the plane, and remove the ground plane on INNER1 in this area, as it does not seem to have any connections in that area.

I see the LI and HI do not have provisions for a small R/C filter in case there is high frequency noise on these traces.

To give more detailed advice on your design can you provide some scope waveforms.

Using scope probe connections with a short ground connection, probing as close to the IC pins as possible record the following. 1) LO, HO-HS (differential probe if possible), and HS. Record a time base to see the turn on and turn off switching edge details, and expand the voltage scale as much as possible. 2) LI, HI, HO-HS, and LO.

Ringing and voltage spikes are typically increased as the power device dV/dt increases. One way to reduce possible excessive ringing is to increase the gate resistance from 10 Ohms which will reduce the MOSFET Vds dV/dt. As an experiment you can try higher gate resistance values to see if there is any improvement.

Confirm if this helps with your concerns, or you can post additional questions on this thread.

Regards,

Richard Herring

0 John Lintern40 over 5 years ago in reply to Richard Herring

Prodigy 60 points

Hi Richard

Thanks for your quick and detailed response :)

Some of the gate drivers have failed on the LO output only, another gate driver failed on both the LO and HO output.

For the moment I need to existing boards to work, design changes to the PCB are not possible at this stage so this will need to wait until later.

I have had issues with other gate drivers (not TI) which didn't have RC filtering on the inputs. When I added an RC filter to the inputs it fixed the problem, so this is something to consider for this design.

The TI reference design does not have RC filtering on the inputs which is why I never added them, is there a reason why RC filtering was not included on the inputs for the TI reference design ?

The boards have been sent away to have the gate drivers replaced, when they are back I will obtain oscilloscope traces as you requested and feed back to you.

Many thanks again for your help and support.

Regards

John

0 Richard Herring over 5 years ago in reply to John Lintern40

TI__Mastermind 21915 points

Hello John,

When you get the boards back to running condition, it will be helpful to see the scope waveforms as mentioned in the previous post.

The need for R/C filters on the driver inputs, is very much dependent on the layout. My general advice is to make provisions for an R/C filter, and if not needed a 0 ohm jumper can be installed as the resistor, and capacitor removed.

I see there may be the possibility of adding input filters on the board where the vias connect to the LI and HI pins, at least for testing purposes.

When you have waveforms available to post I will be happy to review and comment.

Regards

Richard Herring

0 John Lintern40 over 5 years ago in reply to Richard Herring

Prodigy 60 points

Hi Richard, just a brief update on the testing so far.

I scoped various gate signals, phase voltages and phase currents but couldn't see any obvious problems.

One thing I have found is that the gate drivers fail in a certain test condition.

The motor under test is driven by a dyno at various speed intervals whilst various currents are applied to the motor - refer to the diagrams below.

For test 1, the dyno spins the motor anti-clockwise and current is applied to the motor so that it spins in the same direction (anti-clockwise) by applying a positive current - these tests have been successful so far and we have tested up to 5000rpm 35A.

For test 2, the dyno spins the motor anti-clockwise and current is applied to the motor so that it spins in the opposite direction (clockwise) by applying a negative current - these tests cause the gate drivers to fail even at low currents e.g. 5A

Does this give any clues as to whats causing the failures ?

A 20us software task runs a hysteresis current control with sinusoidal commutation, a simulation for a single phase is shown below:

A scope capture is shown below (blue is phase current and green is phase voltage):

The motor produces a back emf of 10V per 1000rpm so we have to use phase advance at higher speeds.

The following scope capture shows the phase voltage and current when the motor is generating (spun by the dyno) with no zero current applied to the motor phases.

When the back emf exceeds the DC link voltage (48V) a phase current can be seen as it flows through the parasitic diodes in the MOSFET. I can't remember the scaling of the current clamp but the magnitude of the current was not a concern.

0 Mamadou Diallo over 5 years ago in reply to John Lintern40

TI__Genius 13445 points

Hi John,

Thanks for the additional information and waveforms.

My name is Mamadou Diallo, I work with Richard who is out of office this week, I will help debug while he is out.

From the scope shots you shared, the phase voltage and phase current on the 3rd waveform do not have any obvious concerns.
The 2nd scope plot however seems to show quite a bit of overshoot on the phase voltage. It looks like ~=20V of overshoot, can you confirm the scale? I wonder whether this is reverting back to the driver's output stage.

I want to take a step back and start from a micro level and debug from there. You mentioned that the driver seems to fail at specific test conditions shown above: Do any other components fail during these tests setup beside the driver? Are you able to capture waveforms on the driver's pins under those test conditions to see whether any (or which pins) of the pins are exposed to voltages higher than the abs max ratings? I ask this to make sure none of the signals on the drivers pins are not exceed the abs max ratings. If it does then we can trace it back to what part of the test setup or design might be causing it.

IN addition to the above scope shots, I would first be interested on signals on the HI, LI, HS, HO, LO as well as VDD. Capturing these signals directly at the pins are often good indicator of warning signs or red flags from an application stand point.

Thanks in advance for your help.

Regards,

-Mamadou

0 Don Dapkus over 5 years ago in reply to Mamadou Diallo

TI__Guru**** 189399 points

Hi, John,

I was just reviewing open threads and ran across this one.

Did you solve your issue? If so, can you share for others what solved it?

If you need help, please post with the information that Mamadou requested.

Because of the holidays, TI E2E™ design support forum responses will be delayed from Dec. 25 through Jan. 2. Thank you for your patience.

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UCC27201A: Gate driver failures