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TINA/Spice/LMR62014: Help simulating phase margin with TINA

Part Number: LMR62014
Other Parts Discussed in Thread: TINA-TI,

Tool/software: TINA-TI or Spice Models

Hello,

I've managed to get the tina schematic for the LMR62014 up and running, but I"m lost as to how to simulate my gain and phase margin.  Could anyone point me in the right direction?  The circuit seems to be working and the transient analysis shows the supply powering up.  I've attached my circuit.  webench_design_3451899_30.TSC

  • Hi Robbie,

    Sorry only TINA average model could generate the bode plot. You file is a transient file which is used for transient simulation.
    To know how stable of your circuit, you can run the load transient simulation with your file.
  • Ok that makes sense. I've changed my simulation with a timed switch to switch on my load. Is this what you are talking about?

    In addition to this, I have a few questions,
    1. If you notice from running the transient sim or looking at the screenshot with the amount of output capacitance I have a very large current spike when the LMR62014 powers up. This approaches 7 amps in the sim. Could this be damaging the LMR62014? I'm seeing failures in the field from this circuit.
    2. The inductor I'm using is VLS201612HBX-6R8M. Do you see any issues with this?

  • Hi Robbie,

    1. What's the circuit working conditions, Vin range, Vout, maximum load current?

    2.  The simulation file that you provided shows no big input inrush current during startup. What's the output capacitance that you used in the field? Can you show the schematic? Yes, if using too big output capacitance, it needs very big startup current to charge the output caps. It may cause over heat of inductor. The IC has current limit and thermal shutdown function. Are you sure the device fails after starting up? Or do you find the inductor burns?

    3. For load transient test, if the output voltage waveform behaves like below picture. That means the phase margin should be big enough(>45).

  • I apologize Zack,

    I've left off quite a bit of information.  Attached is my current simulation that reflects my actual output load.

    My input voltage is 4.5 to 5.5 volts (will be tighter than that because it is USB , but that is my worst case number), my output voltage is 8V.  This drives a buck regulator and a battery charger circuit.  The buck has a lot of input capacitance - 255uF.  I assumed a worst case step load of ~200mA, but this is on the high side.  This supply will likely only see ~150mA.  I figure I'm in good shape if I can handle 200mA.  The vast majority of operation will be a constant 25mA to 50mA load and an average 100mA load when the battery is charging. 

    I don't see this supply failing in the lab, but I am seeing it fail (2 units) with customers.  I don't have the units back yet to do a failure analysis and have to ship out two replacements so I want to double check this circuit as much as I can before I ship replacements.

    I believe my phase margin is ok as I see a similar result.  Corrected simulation is attached.  The step is applied at 2mS so you only have to run the TINA transient sim for 3mS.

    3581.webench_design_3451899_30.TSC 

  • Hi Robbie,

    Do you have any bench startup test waveform? Is the inductor current really that high?
    Even though the simulation shows the charging current at startup is up to 6A. The time is quite short so I don't think it will burn the inductor and IC. And USB's current limit is usually quite low, 0.5A normally. During startup, the real inrush current should not be that high. It's better to do some bench test with your board. Capture the Vin, Iin, Vout waveform. Monitor the temperature of your device with thermal camera if possible.

    To know why the two units fail, use DMM to see which pin is short to GND.