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CSD17527Q5A: CSD17527Q5A

Hugo Liu
Genius 5095 points
Part Number: CSD17527Q5A
Other Parts Discussed in Thread: CSD17579Q5A

Hi Sir,

Our customer want to know, If the CSD17527Q5A Working long hours on VDS=29.3V have any Risk?

Hugo

  • 0
    TI__Mastermind 32670 points
    Hi Hugo,
    Thanks for promoting TI MOSFETs at your customer. Operating the CSD17527Q5A with a peak VDS of 29.3V is not a problem. What concerns me is there is not much margin in this design for component variation. Also, the FET breakdown voltage is reduced at low temperature. From the waveform it looks like the input voltage is ~20V. Because of the time scale, I cannot see any details on the phase waveform. Is it possible to zoom in on the waveform so I can see the details. I am assuming there is some ringing and I would recommend reviewing this app note on ringing reduction: www.ti.com/.../slpa010.pdf. Lastly, the CSD17527Q5A is not recommended for new designs (NRND) and we recommend the CSD17579Q5A as an alternative.
  • 0 in reply to John Wallace1
    Genius 5095 points
    Hi John,

    Thanks for your support,
    we are check with customer for Zoom waveform.


    Hugo
  • 0 in reply to Hugo Liu
    TI__Mastermind 32670 points
    Hi Hugo,
    Just following up. To reiterate, you always want to have some margin built into the design. Some customers like to have 10% to 20% margin to avoid potential problems over a large population of devices from different lots. TI tests avalanche tests 100% of all FETs. However, we do not recommend operating the FET in repetitive avalanche mode as this may degrade it and lead to long term reliability issues. Phase node voltage spikes can be minimized by proper circuit design and PCB layout. Placement of the input MLCC decoupling capacitors is critical. Often times a R-C snubber at the phase node can reduce the voltage spike to an acceptable level with adequate margin. Other techniques such as adding a small value resistor in series with the boot strap capacitor and/or adding a gate resistor can slow down the FET enough to reduce ringing.