TPS61194EVM: Feedback capacitor

Vidhya Jeyapaul

Intellectual 780 points

Part Number: TPS61194EVM

Hi Team,

Can you please let me know how C9=15pF in EVM circuit is calculated?

What is the purpose of this cap?

In datasheet it is mentioned as CFB=4.7pF. There are no other explanations defined for this part.

Thanks and Regards,

Vidhya

over 6 years ago

0 Sean Zhou over 6 years ago

TI__Mastermind 22745 points

Hi Vidhya,
CFB was used to compensate a pair of zero-pole for control loop. In most cases lower frequency has higher system efficiency. DC-DC internal parameters are chosen automatically according to the selected switching frequency to ensure stability. In boost mode a 15-
pF capacitor CFB must be placed across resistor R1 when operating in 300-kHz to 500-kHz range. When operating in the 1.8-MHz to 2.2-MHz range CFB = 4.7 pF.
Regards
Sean

0 Vidhya Jeyapaul over 6 years ago in reply to Sean Zhou

Intellectual 780 points

Thanks Sean.

I don't see any internal error amplifier in the functional block diagram of this part. How this capacitor which is in parallel to the top feedback resistor is used for loop compensation?
Can you please clarify?

Also, 4.7pF is fixed or can use values higher than that (say 7pF) ? What will be the impact in this case?

Regards,
Vidhya

0 Sean Zhou over 6 years ago in reply to Vidhya Jeyapaul

TI__Mastermind 22745 points

Hi Vidhya,

There is an internal GM(OTA), the cap connected to the top feedback resistor will lead to the small signal transfer function. I believe there are lots of documents describing about this type 3 compensation.
The 4.7pF is a recommend value, it can support most application, actually the final value can be adjusted by real loop test and transient requirement.

Regards
Sean

0 Vidhya Jeyapaul over 6 years ago in reply to Sean Zhou

Intellectual 780 points

Hello Sean,

I have worked with type3 compensation circuits where there will be a resistor in series to that CFB cap.
Also ICs will have compensation pin with RC and C network to improve the loop stability.

Only capacitor will act as pole along with LC pole?
Please clarify
To start with, I will start with 4.7pF ( Fsw is 2.2MHz in my case) and then gradually increase?

Regards,
Vidhya

0 Sean Zhou over 6 years ago in reply to Vidhya Jeyapaul

TI__Mastermind 22745 points

Hi Vidhya,
Your mentiond R and C is integrated into the IC, only one CFB is ok if you can write the zero and pole equation.
Regards
Sean

0 Vidhya Jeyapaul over 6 years ago in reply to Sean Zhou

Intellectual 780 points

Ok Sean.

Is there any way by which I can compute this CFB value theoretically?
Is there any formula for the same?

Please clarify.
Regards,
Vidhya

0 Sean Zhou over 6 years ago in reply to Vidhya Jeyapaul

TI__Mastermind 22745 points

Hi Vidhya,
I'm sorry that we don't have such document or calculation guide.
Regards
Sean

0 Vidhya Jeyapaul over 6 years ago in reply to Sean Zhou

Intellectual 780 points

Ok Sean.

My requirement is 17V, 190mA. Vboost max is 22V (30% of 17V) Iset is 50mA each channel. I have used 2 channels for one LED string and 2 other channels for another LED string.

Fsw=2.2MHz

With CFB=7pF, T divider used R1=100K, R2 to gnd = 39K and R3=100K to FB pin of the LED driver.

Refer to the loop stability plot attached.

Phase and gain margins are not good.

Kindly guide me through this.

Regards,

Vidhya

0 Sean Zhou over 6 years ago in reply to Vidhya Jeyapaul

TI__Mastermind 22745 points

Vidhya,
In which duty cycle you tested with this loop? You need to set at 100% duty cycle since it used the PWM dimming mode. You can try to decrease the CFB value to 4.7pF and re-test the loop.
Regards
Sean

0 Vidhya Jeyapaul over 6 years ago in reply to Sean Zhou

Intellectual 780 points

Hello Sean,

Duty cycle is 100% , tested under room temperature.

PFA Loop test result with 4.7pF. It is still not stable. Please suggest.

Regards,

Vidhya

0 Sean Zhou over 6 years ago in reply to Vidhya Jeyapaul

TI__Mastermind 22745 points

Hi Vidhya,
You can try to decrease the switching frequnecy and increase the output capacitor value.
Regards
Sean

0 Vidhya Jeyapaul over 6 years ago in reply to Vidhya Jeyapaul

Intellectual 780 points

Hello Sean,

Kindly revert on this.

Regards,

Vidhya

0 Sean Zhou over 6 years ago in reply to Vidhya Jeyapaul

TI__Mastermind 22745 points

Vidhya,
Have you tried to decreased the switching frequency? and what's the result?
Sean

0 Vidhya Jeyapaul over 6 years ago in reply to Sean Zhou

Intellectual 780 points

Hello Sean,

I tried changing the switching frequency from 2.2MHz to 1.8MHz. CFB=4.7pF. There is no improvement in performance.

PFA plot.

Please share your feedback on this.

Regards,

Vidhya

0 Sean Zhou over 6 years ago in reply to Vidhya Jeyapaul

TI__Mastermind 22745 points

Vidhya,
From the results as above, the PM is good enough. what's your concern about your application?
Sean

0 Vidhya Jeyapaul over 6 years ago in reply to Sean Zhou

Intellectual 780 points

Hello Sean,

Gain margin is not met.
At 0 dB, Phase Margin= 55.48 degree
Phase crosses zero many times. Considering the first zero crossing, there are no sufficient gain margin.

Please suggest.

Regards,
Vidhya

0 Sean Zhou over 6 years ago in reply to Vidhya Jeyapaul

TI__Mastermind 22745 points

Vidhya,
What's your application issue? I think the loop is ok now. Have you found any application issue or you just want to get a good graph?
Regards
Sean

0 Vidhya Jeyapaul over 6 years ago in reply to Sean Zhou

Intellectual 780 points

Sean,

There is flicker issue observed on board.

For a stable system, Gain margin should also be met.

Is it ok if only Phase margin is met?

Regards,

Vidhya

0 Vidhya Jeyapaul over 6 years ago in reply to Vidhya Jeyapaul

Intellectual 780 points

Hello Sean,

Kindly share your input on this.

Regards,

Vidhya

0 Sean Zhou over 6 years ago in reply to Vidhya Jeyapaul

TI__Mastermind 22745 points

Vidhya,
I don;t have much commons on your appliation. Sometimes we just focus on the phase marin.

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TPS61194EVM: Feedback capacitor