Hello,
I’m using LM27761 in a 5V input and -3.5V output configuration supplying 150mA output current to deliver negative supply to some really sensitive analog circuits. My prototype PCB is a FR4 4-layer and is working fine except for 1 issue.
There is a significant amount of noise radiating from the flying capacitor (which is on the PCB edge – I realize this as a mistake in retrospect) which is getting picked up by a really sensitive opamp 3cm away (also along the same PCB edge). I see very sharp positive and negative spikes on the opamp output aligned to the spikes associated with flying capacitor charging/discharging at the same 2MHz frequency. I don’t see any conducting noise going into the same opamp’s supplies – hence I’m narrowing it down to radiating noise. I can see flying capacitor’s noise on the scope just by bringing the probe near the cap. Being on the PCB edge probably makes the problem worse.
I tried to follow the layout guidelines provided in the datasheet. I had not seen the LM27761 eval board back then. However, when I compare my layout to that in the evaluation board now, I see several issues in my layout which I plan to fix in the next revision. Can you please review to see if I should fix/change anything else?
My top layer layout is attached. The top cap is the flying cap. Blue highlighted in the underneath ground plane. The sensitive opamp is 3 cm to the right along the edge.
I plan to do following changes in the next rev of PCB:
1) Current 1uF flying cap size is 0805. I’ll change it to 0402 (as in eval board) and bring it as close as possible to its pins (moving the enable via away a bit). I think this is the biggest cause for the noise.
2) In Top layer and GND layer, I’ll insert ground pour all around the flying cap to prevent direct adjacency to the PCB edge. Unfortunately, I cannot move the cap anywhere else or away from the edge. I think this is the next biggest cause for the noise.
3) Even though the ground plane/layer is not present directly underneath the flying cap, it is almost there. I’ll pull it back away from the cap a bit.
4) Cin and Cpout cap sizes are currently 1206. I’ll change them to 0603 and bring them closer to the pins. Currently, I have Cpout as 4.7u. I’ll change it to 2.2u to accommodate reduced 0603 size.
5) I’ll reorient Cin, Cpout, Cout as shown in evaluation board.
6) Following the datasheet, pin 2 (GND) is not directly connected to the thermal pad in the top layer. They are connected via the GND layer. However, as shown in eval board, I’ll connect pin 2 and thermal pad in the Top layer itself.
7) I’ll move the feedback resistor little away and bring cout closer as done in eval board.
What is the purpose of the large C+ and C- solder pads next to the flying cap in the eval board? Is it a placeholder for a large size cap - for what purpose though? Or is it present for some other reason?
I’d appreciate if you have any other layout recommendations.
Thanks so much,
Satish Acharya
