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TPS2121: ST Pin

Murat Kuru
Prodigy 20 points
Part Number: TPS2121

Hi,

In the TPS2121 datasheet both table 2 and 3 (and related text) say at the last column that the ST Pin would be high if both inputs are invalid (INx ≤ UV OR OVx ≥ VREF). Obviously, this cannot be true if there is no power (INx=0) applied yet. However, if this is not a typo, can you please tell me the typical time that would be true (ST high) after both inputs go to zero? After that time, is it Hi-Z or ground (I could not tell from the functional block diagram?

Thank you for your help.

  • 0
    TI__Genius 10855 points
    Hi Murat,

    Thanks for reaching out on E2E!

    The ST pin can be connected to an external voltage source to provide feedback, even if both inputs are 0V. This is why we spec the channel selection even if both channels are HI-Z or not valid.

    The ST timing would be the same in this scenario, which is spec'd on page 8 of the datasheet (~1uS).

    Thanks,
    Arthur Huang
  • 0 in reply to Alpha H
    Prodigy 20 points
    Hi Arthur,

    Thank you. OK for the timing. But I want to ask you about ST again. Let's say INx, OVx, PR1 and CP2 pins are all 0V. What is the state of ST pin (H, L or Hi-Z)?
    Best regards
  • 0 in reply to Murat Kuru
    TI__Genius 10855 points
    Hi Murat,

    In that condition, the ST pin will be pulled high if you connect it to an external supply. Since the pin is an open-drain, it will be pulled up unless IN2 is the output.

    Thanks,
    Arthur