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TPS65218D0: Registers which are not reset when IC enters OFF mode with Coin-Cell battery

Koshi Ninomiya
Expert 5495 points
Part Number: TPS65218D0

Hi Team,

TPS65218D0 could have some registers which are not reset when IC enters OFF mode with Coin-Cell Battery application. One is FSEAL bit of STATUS Register.
 Q1: Are there any other bits or registers which are not reset when IC enters OFF mode with Coin-Cell Battery application?

Registers other than the above are reset to their default values in OFF mode, SUSPEND state, RESET state, or VIN_BIAS < VUVLO condition.
 Q2: Are there any other mode/state/condition that resisters are reset?
 Q3: What voltage is the VUVLO (UVLO threshold) of VIN_BIAS?
        Datasheet shows only VUVLO Hysteresis, 200mV or 400mV.

Thank you.

Best Regards,

Koshi Ninomiya

  • 0
    TI__Genius 9380 points
    Ninomiya-san,
    I have forwarded your questions to our product specialist. You should hear from someone soon.
  • 0
    TI__Mastermind 30310 points

    Ninomiya-san,

    Koshi Ninomiya said:
     Q1: Are there any other bits or registers which are not reset when IC enters OFF mode with Coin-Cell Battery application?

    The purpose of the FSEAL bit is to keep DCDC5/6 on when Coin Cell is the only power supply. The bit cannot be reset when main power supply VIN_xxxx is removed, or the feature of FSEAL would not function properly. This is the only bit in normal operation that does not reset. If the TPS65218D0 device is re-programmed to different default values, then Bit 6 of STATUS register will always be 1b, because the EEPROM is different than the factory settings.

    Koshi Ninomiya said:
     Q2: Are there any other mode/state/condition that resisters are reset?

    See Figure 5-34. Modes of Operation Diagram on page 47 in the TPS65218D0 datasheet for every state machine transition that causes the registers to reset to the default values.

    Koshi Ninomiya said:
     Q3: What voltage is the VUVLO (UVLO threshold) of VIN_BIAS?

    See 5.6.4.12 CONFIG1 Register on page 63 of the datasheet, which shows UVLO can be set to 2.75V, 2.95V, 3.25V, or 3.35V using bits 1..0 of the register and the default setting is UVLO[1..0] = 00b = 2.75V