Linux/TPS659037: TPS659037 watchdog support in device tree / linux

Hi, Chris,
Watchdog is disabled by default. SW can enable watchdog and lock (write protect) watchdog register (WATCHDOG).
The watchdog timer has two modes of operation, periodic mode and interrupt mode.
In periodic mode, an interrupt is generated with a regular period N that is defined by the WATCHDOG.TIMER setting. This interrupt is generated at the beginning of the period (when the watchdog internal counter equals 1). The IC initiates a shutdown at the end of the period (when the internal counter has reached N) only if the interrupt has not been cleared within the defined time frame (0 to N). In this mode, when the interrupt is cleared, the internal counter is not reset. The counter continues to count until it reaches the maximum value (defined by the TIMER setting) and automatically rolls over to 0 in order to start a new counting period. Regardless of when the interrupt is cleared within a given period (N), the next interrupt is generated only when the ongoing period completes (reaches N). The internal watchdog counter is initialized and kept at 0 as long as the RESET_OUT pin is low. The counter begins counting as soon as the RESET_OUT pin is released.
In interrupt mode, any interrupt source resets the watchdog counter and begins the counting. If the sources of the interrupts are not cleared (INT line released) before the end of the predefined period N (set by WATCHDOG.TIMER setting) then the device initiates a shutdown. If the sources of the interrupts are cleared within the predefined period, then the watchdog counter is discarded (DC) and no shutdown sequence is initiated.
Please also refer to "Watch Dog Timer Register" in Section 3.7.5 of register map which is linked below; there are details about the registers and bits definition:
www.ti.com/.../sliu015b.pdf.

Hi Phil,

thank. This I knew. This works if we want to use control watchdog directly by I2C.

The question was more if there is any support for this watchdog in the PMIC device tree node as it is the case with the remaining PMIC functionality like RTC, etc.

When controling the watchdog directly by I2C I'm afraid of resource conflicts:

1) The PMIC device tree node is a subnode of the I2C1 bus node. So the driver will write to PMIC node address possibly at the same time when we will directly by I2C.

2) In the PMIC device tree node the PMIC interrupt is defined hence there will be handler for this interrupt already. How could we then attach our routing which clears the watchdog bit.

Best regards, Chris

Hi,

I'll make a new post to the AM57xx forums. The lore.kernel.org/.../ code does not seem to be part of the current Kernel..

Regards, Chris