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TPS65217: Power Down sequence

Apurva Ankleshwaria89
Intellectual 460 points
Part Number: TPS65217
Other Parts Discussed in Thread: AM3351, , TL5209

Hi,

We conducted power down sequence tests on our custom board consisting of AM3351 with TPS65217C. It also has TL5209DR enabled through LDO4 of TPS. We observed few inconsistencies in power down sequence of TPS as mentioned in the datasheet. 

1. VDCDC1 power down happens before VDCDC2. Also, power down happens only to 0.5V initially. (VDCDC1 - Red, VDCDC2 - Blue)

2. VLDO2 power down happens before VDCDC2. Also power down happens only to 0.5V initially (VLDO2 - Red, VDCDC1-Blue)

3. Additionally, also conducted test to check if difference between VDDS and VDDSHV is going above 2V at any point. (VLDO4(connected to VDDSHV) - Blue, VLDO3(connected to VDDS) - Red, Subtraction of both- Purple) 

Please let me know of possible issues/solution

Thanks!

  • 0
    TI__Mastermind 30280 points
    When you measure VLDO4(connected to VDDSHV) in the last scope shot, are you measuring LDO4 on the TPS65217 or are you measuring the output of the TL5209DR?

    If TL5209DR is powering the VDDSHV domain of the processor, then measuring LDO4 of the PMIC would not be the correct place to measure to perform this subtraction.

    It is concerning to me that the LDO4 rail does not go to 0V in this scope capture.

    How are you powering the TPS65217? Applying power at AC only with no battery? Is anything connected to the BAT pins in your system?

    And what is your method for performing the power-down sequence? Using I2C write from processor to PMIC, or simply by removing power from the input?
  • 0 in reply to Brian Berner
    Intellectual 460 points

    Hi Brian,

    VDDSHV domain of processor is powered through LDO4. TL5209DR is only used to power up eMMC and uSD card on the board. 

    Thus for subtraction, VLDO4 and LDO3 is used which is appropriate.

    I am powering through USB_DC. Nothing is connected to to BAT pins of TPS

    Power down is through I2C write from processor to PMIC.

  • 0 in reply to Apurva Ankleshwaria89
    Intellectual 460 points

    Hi Brian,

    Probe few more power signals

    1. VLDO4 and VIN(5V) for LDO4 (Blue-VLDO4, Red - VIN)

    2. VLDO3 and VIN(5V) for LDO3 - Blue:VLDO3.  Red:VIN

    3. VLDO4 and Output of TL5209DR (VLDO4 acts as enable for TL5209DR) Blue:VLDO4, Red:Output of TL5209

    Observation from plots:

    1. VIN has a temporary plateau of 1.132V

    2. Output of TL5209DR has a temporary plateau of 773.6mV

  • 0 in reply to Apurva Ankleshwaria89
    TI__Mastermind 30280 points
    Apurva,

    Have any issues occurred with this design? Has anything been damaged?

    Or are you simply concerned that the power-down sequence on your board does not match the documentation?
  • 0 in reply to Brian Berner
    Intellectual 460 points

    Hi Brian,

    No issue/damage has happened to the design.

    The question is more from long term reliability perspective of the design. Please share your thoughts.

    Thanks

  • 0 in reply to Apurva Ankleshwaria89
    TI__Mastermind 30280 points

    Apurva,

    If you refer to the attached scope shots, you will see that the power-up sequence for TPS65217C matches exactly as it is defined in the AM335x User's Guide and in the TPS65217 datasheet.

    Power-up sequence (triggered by USB 5V applied).

    Power-down sequence (triggered by I2C write of 1b to bit 1, SEQDWN, of SEQ6 register, 0x1E).

    If you need the perspective of the reliability of the AM335x processor, I will need to re-assign this post to the Sitara Processor forum. The PMIC does not cause voltages to increase after they have started decreasing. They ramp smoothly from the set voltage down to 0V, even with no load applied. Any sequencing that does not match the datasheet is caused by something in the system other than the PMIC.