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TPS23753AEVM-004: design discussion

Part Number: TPS23753AEVM-004

Hi,

 

Here’re some questions from customer about TPS23753A-004EVM.

1. For the original EVM which is synchronous MOS at secondary side, why it will be CCM even load=0A? What’s the gate turn on/off criteria? When changed secondary MOS to diode SBR10U45SP5-13, it will into DCM when light load.

 [MOS]0A

[Diode]0.5A

2.Why the VCS signal will be negative when using synchronous MOS at load=0A?

3. When use diode and the load=0A, we will see the gate like below(until load add to 20ma, then gate become stable and fixed frequency), Is that unstable?

(ignore channel 3, there's no gate due to diode)

[0A]

[20mA]

thanks.


  • Hi Lynn,

    1. Synchronous allows reverse current this is why is stays at CCM. A diode would block the reverse current.
    2. Same as #1
    3. This is not unstable, this is normal behavior. At no load, it's possible the converter will pulse skip because there is no need to turn on the primary FET to charge the transformer. Therefore it could skip pulses. The frequency of the pulses will be relative to the amount of output cap. At some point, as you add load, it allows the output cap to discharge so the DCDC will need to have longer pulses to transfer the energy.
  • Hi Darwin,

    thanks for feedback. customer wonder the pwm on/off criteria details, can you explain the block diagram? The gate will stop switching  when VCTL<VZDC? And the VCS>VCSMAX also stop switching?

  • Hi Lynn,

    Yes this is correct. Also when there is no more gate drive (VC < VCUVLO) and the PWM controller will stop switching.