Hi Team,
My customer designed the TPS23753 AEVM-004 as a reference.
A surge voltage is inserted at the rise of the voltage between D and S of the primary side FET.
Also, instantaneous current flows in at the rising of the current waveform as well.
Should I understand that the momentary surge is not a problem within the rating of the FET?
Is there any way to reduce this surge?
Another point, the voltage between D and S of the secondary side FET also has a similar voltage surge,
and the voltage rises close to the breakdown voltage of the FET being used, so it needs to be suppressed.