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TPS23753: Surge suppression to FET

Part Number: TPS23753

Hi Team,

My customer designed the TPS23753 AEVM-004 as a reference.

A surge voltage is inserted at the rise of the voltage between D and S of the primary side FET.

Also, instantaneous current flows in at the rising of the current waveform as well.

Should I understand that the momentary surge is not a problem within the rating of the FET?

Is there any way to reduce this surge?

Another point, the voltage between D and S of the secondary side FET also has a similar voltage surge,

and the voltage rises close to the breakdown voltage of the FET being used, so it needs to be suppressed.

Please tell me the measures.
Best Regards,
Kenji
  • Hi Kenji,

    The voltage "surge" I believe you are referring to is the voltage spike at turn OFF. This is normal behavior and is due to the leakage of the transformer. The snubber clamps this voltage. You can increase the snubber as necessary to reduce the spike at the expense of some efficiency. You can also choose a more higher rated primary/secondary FET. You can also try slowing down the turn off of the FET by increasing the series gate resistor of the primary FET.