LP3966: Junction-to-board thermal resistance

Hi Carl,

LP3966 was originally released by National Semiconductor before the TI acquisition. It does not appear that the full thermal modeling was performed on this family to date. I will submit for the thermal information on this device. Please allow for up to two weeks for the modeling to be completed.

In the meantime, please note that with any linear regulator board layout will have a big impact on the thermal performance. Our standard thermal information is modeled on a JEDEC Hi-K board in order to provide a standardized layout and measurement technique for comparison purposes. The following Application Report goes into detail on how board layout impacts the thermal performance of linear regulators.

www.ti.com/.../slvae85.pdf

Very Respectfully,
Ryan

Hi Ryan,

Thanks for the information. We informed the customer about the 2 weeks modeling time and shared Application Report too.

Best regards,

Carl Ramirez

Hi Carl,

While we wait for the modeling results, I just wanted to check in to see if you had any questions about the Application Report.

Very Respectfully,

Ryan

Hi Ryan,

Thank you for the update. So far, our customer has no question regarding the application report.

Best regards,

Carl Ramirez

Hi Carl,

There is a high volume of thermal models in the currently.  I will update you as I receive additional information.

Very Respectfully,

Ryan