BQ77905: CHRG_FET pin behaviour at UV

Hi Matt,

thanks for your answer. Are you sure about R_CHG being 3 MOhm? In the datasheet I find only the recommendation to increase R_GSCHG to > 3 MOhm and leave R_CHG at 1 MOhm.

Best regards,

Manuel

Hi Manuel,

Sorry, you are correct. R_GSCHG should be > 3M, but you already have this in your schematic.

Are there any other conditions that may be causing the CHG FET to switch off (since UV should not cause this)? Figure 14 in the datasheet shows the 10 conditions that can trigger this.

Regards,

Matt

Hi Matt,

no other faults. The only thing we do is reducing the voltage of one cell to less than 2V.

What is the behaviour of the LD circuit inside the bq77905?

Does it disconnect the LD pin somehow and thereby separate the potential of the CHRG-FET source pin?

Thanks,

Manuel

Hi Manuel,

When you reduce the voltage of one cell, how are you doing this? Are you using a resistor divider on the other cells?

Let me look into your questions on the LD circuit and get back to you tomorrow.

Best regards,

Matt

Hi Matt

I use a power supply for 50V and a resistor divider with 200 ohm each for every cell level.

Hi Manuel,

I have seen something like this before when using a resistor divider. When you force a lower voltage on one of the cells in the divider string, it will cause the voltage to be higher on the other cells. Do you think it is possible there is an over-voltage condition on a different cell while you are forcing a lower voltage on the one cell?

Regards,

Matt

I don't think this is an issue.. we check all 16 cell voltages with a bq76pl455 and they are in the right range.

I reckon that there is not really a fault because we still have a low voltage (250mV) at CHRG-FET wheras at the DISCH-FET there is exactly 0V.

Did you find out about the LD circuitry? Is it involved in the gate-source electric mesh?

Thanks,

Manuel

Hi Manuel,

The CHG fault circuitry is separate from the DSG fault circuitry and LD circuitry, that is UV does not cause CHG to turn off or LD to influence the CHG output.  Faults are summarized in table 5 of the BQ77905 data sheet, you might check conditions at the the occurrence of the fault to be sure one of these has not been met. You might also look at how the recovery is performed.

Another thing to look at is how the "CHRG-FET off" is observed.  When DSG turns off, Q222 in your design is off and PackN is no longer held near GND.  If CHG is measured with respect to GND it should still show high if UV is the only fault.  If CHG is measured with respect to PackN the meter with R221, R224, and R230 try to pull PackN up while LD through R260 (LD0) tries to pull down.  Other than the meter this is the point of Figure 23 of the data sheet and the 3M resistor.  With a high impedance meter you should still measure a significant voltage on CHG from PackN.

A third thing to check is for instrumentation differences or load differences on PackN.

If the measurements are DSG from GND and CHG from GND a higher voltage on CHG may be reasonable since CHG has the extra circuit to allow it to go below GND.  If this is the case check for other unintended faults.

Ok thanks, this makes things clearer to me.

We have the gate voltage of CHRG-FET between gate-GND but not between gate-source. As soon as we connect it to a charger, the voltage recovers and the FET turns on.

However, with exactly the same board but with a BQ7790500 (instead of a bq7790508) we have a different behaviour. LD pin is at 5V with the BQ7790508 and at 0.5V with the BQ7790500...

Is it possible to measure R_LD_int somehow?

Thanks,

Manuel

Hi Manuel,

We cannot think of any reason there would be a difference between the BQ7790500 and the BQ7790508. The LD pin functionality should be the same between these two devices. 

Do you have any update to your observations?

Thanks,

Matt