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ISO5852S: Soft Turn Off, when using the external current buffer circuit

Part Number: ISO5852S

Hello,

when using a ISO5852S with the external current buffer circuit. How does the soft turn off function can be applied?

When connecting the pins OUTH and OUTL as depicted in the figure of the datasheet below, the soft turn off procedure has almost no effect on the damping of a swinging gate voltage in the path of RG. Especially, this is the case when SiC device switches off a high current, when DESAT is detected.

In the case of a DESAT detection, how is the switch off procedure coordinated, when soft turn off is active and the miller clamp is copnnected to the gate of the power semiconductor gate in the circuit below? For how long must the gate voltage stay below 2V to activate the clamping or how much does a ringing gate voltage effect the activation of the clamping?

 

Thank you in advance for helping out and best regards,

Tobias

  • Hello Tobias,

    Soft turn off can be implemented with an external buffer through the use of a capacitor and resistor connected in series from OUTL to VEE. The design procedure is described in this training powerpoint in pages 25-29.

    The timing diagram for STO in the case of DESAT detection is given in Fig. 46 of the datasheet. Once DESAT is detected, STO is performed where the external R and C circuit determines the timing of VGE/VGS turning off. Once VGE/VGS drops below 2V, the miller clamp is activated to keep the device in the off-state. By this point, the device has been turned off and the miller clamp is used to prevent it from turning on again falsely.

    Regards,

    Audrey 

  • Hi Audrey,

    Thank you for your reply. Unfortunately the link to the training slides was not available. The message says:

    "Unfortunately, the page you've requested no longer exists. Please use the search form above to locate the information you're interested in."

    Could you please arrange to make the slides available or can you tell me the name of the Training, so that I can search for it?

    Regards,

    Tobias

  • Hi Tobias,

    I apologize for the bad link. The training is located in TI Training and is titled "Designing with Isolated Gate Drivers for HEV/EV Applications". The video lecture and pdf of the slide deck is located on the training page here.

    If that works, please click the green button to let us know!

    Regards,

    Audrey