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BQ76930EVM: BMS of 7 cells

SHASHANK KUMAR49
Prodigy 155 points
Part Number: BQ76930EVM
Other Parts Discussed in Thread: BQ40Z80, BQ77915, BQ76930, BQ78350-R1

Dear Sir/Mam,

I need a BMS with cell balancing for 7 cells in series combination of 3.7V/2600mAh Li-ion with 2A charging and 2A discharging. Please suggest proper part for the same so that i start my design and also provide some reference design.

Regards

Shashank Kumar

  • 0
    TI__Guru* 81035 points

    Hi Shahank,

    There are a couple of different option depending on what you need. The BQ76930 is a battery monitor with cell balancing and protection. The BQ77915 is a protector with cell balancing. If you need battery gauging in your application, the BQ40Z80 might be a good option (cell balancing, protection, and gauging) or you can use the BQ78350-R1 that is the companion controller and gauge for the BQ76930.

    This video may help you choose which is best for you: https://www.youtube.com/watch?v=hIBP6UlAyfo

    This video guides you through creating your schematic with the BQ76930 and near the beginning of the video, it presents 5 different reference designs for this family of device: https://www.youtube.com/watch?v=B5dsIc2C_xA 

    Best regards,

    Matt

  • 0 in reply to Matt Sunna
    Prodigy 155 points

    Thanks a Lot Matt,

    BQ77915 is suitable for my application. Is there any reference design from TI based on BQ77915 as TIDA00449 based on BQ76930.

    Because it helps a lot, from the reference design we get the gerber file and easily develop the PCB otherwise it is time consuming.

  • 0 in reply to SHASHANK KUMAR49
    TI__Guru* 81035 points

    Hi Shashank,

    The BQ77915 is a newer device and there have not been any reference designs developed yet featuring this device. The EVM is a pretty good starting place though - it resembles a typical application circuit.

    Here are a couple of videos to help you get started with the BQ77915:

    https://www.youtube.com/watch?v=LfiUsEfSQec

    https://www.youtube.com/watch?v=wewL0oJRBNM

    If you need gerber files for the EVM, send me a private message on E2E with your email address.

    Best regards,

    Matt

  • 0 in reply to SHASHANK KUMAR49
    TI__Guru* 81035 points

    Hi Shashank,

    Thanks. I just sent you an email with the requested files.

    Best regards,

    Matt

  • 0 in reply to Matt Sunna
    Prodigy 155 points

    Thanks a lot Matt

  • 0 in reply to SHASHANK KUMAR49
    Prodigy 155 points

    Dear Sir,

    Please check and confirm our schematic we prepare it for 7 cells in series combination.

    Regards

    Shashank4073.BMS Schematic.pdf

  • 0 in reply to SHASHANK KUMAR49
    TI__Guru* 81035 points

    Hi Shashank,

    I reviewed the schematic and here is my feedback:

    - There are currently 5 cells connected to the upper device and 2 cells connected to the lower device. There should be a minimum of 3 cells connected to a device. As suggested on Page 30 of the datasheet, for 7 cells, connect four cells on the upper device and 3 cells on the lower device.

    - The cell numbering makes it look like the lowest cells in the battery stack are connected to the upper device. The lowest cells should be connected to the lower device.

    - For the CBI pins, 1k resistors are used, but the datasheet specifies 10k. (resistor from top device CBI to bottom device and resistor from bottom device CBI to GND)

    - There is no need to connect CBO for the top device.

    - It looks like your cell input resistors are 1k (suggested value for external cell balancing), but your circuit is designed to use internal cell balancing. In this case, these values should be much smaller. See the Design Example in Section 10.2.2 of the datasheet for an example on how to select this value.

    - The input filter capacitors for the cell inputs should be connected between the cells for VC2-VC5. The VC1 cap and the VC0 cap connect to GND. Currently, all of the capacitors are connected to GND in your schematic.

    - The resistor values between the upper device's CHG/DSG pins and the lower device's CTRC/CTRD pins should be 10M.

    - The resistor value between LPWR of upper device and PRES of lower device should be 10k. R18 is not needed on the upper device.

    - The OCDP resistor (R13) should be 10M. The OCDP for the lower device should be selected from Table 3 of the datasheet. 1k is not a valid value.

    - If the PRES pin is left floating on the upper device, the device will be in Hibernate mode.

    - The CCFG pin connection for each device is very important. It is currently floating for both devices which is incorrect. CCFG tells the device how many cells are connected. See Table 7 of the datasheet for instructions on how to connect this pin for each device.

    I highly recommend going through the datasheet carefully, especially the 'Stacking Implementations' section. There are a large number of problems with this first version.

    Best regards,

    Matt

  • 0 in reply to Matt Sunna
    Prodigy 155 points

    Dear Matt,

    Thanks for your kind support.

    Schematic updated. please cross check and values of R8 & R18 also changed when mounted on Board.

    Regards

    Shashank Kumar

    7658.BMS Schematic.pdf

  • 0 in reply to SHASHANK KUMAR49
    TI__Guru* 81035 points

    Shashank,

    I don't see all of the changes. This looks like it shows most of the same issues I highlighted yesterday.

    Matt

  • 0 in reply to Matt Sunna
    TI__Guru* 81035 points

    Shashank,

    If you don't have any update, I will go ahead and close this thread for now. It will automatically reopen if you have an updated schematic to send at any point in the future.

    Best regards,

    Matt

  • 0 in reply to Matt Sunna
    Prodigy 155 points

    Hi Sir,

    Sorry for the delay.

    Attached is the updated schematic.

    Please review.

    Regards

    ShashankSCHEMATIC_BMS_7CELLS.pdf 

  • 0 in reply to SHASHANK KUMAR49
    TI__Guru* 81035 points

    Hi Shashank,

    This looks much better. Here is my feedback:

    - (From before) The cell numbering makes it look like the lowest cells in the battery stack are connected to the upper device. The lowest cells should be connected to the lower device. (Lower device should connect to C0-C3, upper device should connect to C3-C9

    - C4, C5, C7, C10, C16, C26, C25 should be removed. See Figure 16 or Figure 17 in the datasheet for an example on how input caps should be configured.

    - C20 is connected to GND instead of GND1

    - The LEDs and resistors (used as cell balance indicators for the EVM) are not needed for a real application circuit.  (D5-D11)

    Best regards,

    Matt

  • 0 in reply to Matt Sunna
    Prodigy 155 points

    Dear Sir,

    Thanks a lot.

    I am starting working on BMS and attached is the final schematic.

    during testing when i connect LED load to the Pack -ve and pack +ve terminal it works properly. But when i connect this to my circuit where i have to use this output voltage of bms slightly falls to 0V from 28V.

    circuit diagram of my application is attached and BMS schematic and layout also attached.

    Please support for the same.

    Regards

    Shashank

    1362.SCHEMATIC_BMS_7CELLS.pdfBMS Layout.pdf7 Cell BMS Schematic.pdf

  • 0 in reply to SHASHANK KUMAR49
    TI__Guru 54715 points

    Hi Shashank,

    The schematic and question look similar to the post https://e2e.ti.com/support/power-management/f/196/t/820450 which has a more fitting subject.  It seems your question is considered there and I will close this post.