Hi E2E,
We measure the EVM of Q1 MOS, and find the glitch when gate falling.
Did you kindly let us know why had this glitch? Did have any risk?
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Hi E2E,
We measure the EVM of Q1 MOS, and find the glitch when gate falling.
Did you kindly let us know why had this glitch? Did have any risk?
Hi Julian, this is not an issue. This is happening at less than 1V which is lower than the VGS threshold.
Hi Darwin,
Because our customer want to know the detail about this waveform. Could you kindly let us know why will happening at less than 1V which is lower than the VGS threshold?
Could we add any component to improve this waveform?
Hi Julien,
It could be an artifact of the miller cap of the synch FET.
You can try increasing (slightly) C22.