BQ76930: BQ76930 Open circuit detection

Hi User,

An open wire should manifest by showing one cell high and one cell low. Presumably in your example with VC2 open, cell 2 could read 2.2 while cell 3 reads 5.2 instead of both reading 4.2, the host should recognize this condition even if the fault thresholds are not met in the BQ76930.  If the VC2 fell all the way to VC1,  cell 2 should read 0 while cell 3 will read the maximum data value.  If the transition happened quickly or the UV was cleared, the BQ76930 would not indicate UV since the cell 2 value would be below UVMINQUAL.

If desired, the host could implement a open cell test algorithm using the cell balance.  Cell balance pulls the selected cell terminals together, and is duty cycled.  If a wire is broken the cell will not be present to pull the voltage back to normal during the measurement cycle. See figure 5 and 6 of http://www.ti.com/lit/an/slua775/slua775.pdf. Because of the 250 ms scheduler timing the test should run long enough to be sure the balancing has started and a measurement taken, the designer may want to allow several scheduler cycles, perahps 750 ms to ensure all measurements are updated.  The algorithm designer would need to select whether to test cells individually or some combination of every-other or every-third cell during the test.  The algorithm should consider the BQ76930 (or BQ76940) group boundaries so that cell 5 and 6 are not balanced simultaneously during the test which could create an equal voltage divider from the balance resistors.