We are looking for information on, or some knowledgeable in our CSD device physics to talk with, to help us understand when and how to apply FET SOA curves in Switch Mode Power Supply applications.
Thank you in advance,
Kurt
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We are looking for information on, or some knowledgeable in our CSD device physics to talk with, to help us understand when and how to apply FET SOA curves in Switch Mode Power Supply applications.
Thank you in advance,
Kurt
Hi Kurt,
Thanks for the inquiry. Below are links to a couple very useful blogs on SOA and MOSFET 101. For discrete FETs, the SOA curves in the datasheet follow an industry standard approach of plotting IDS vs. VDS for different pulse widths. These curves are based on actual test-to-failure data and are most applicable when the FET is operated in the saturation region where VDS > VGS - VTH. This includes applications where the FET is conducting drain current while there is significant voltage across drain-source such as linear regulator, hot swap and OR'ing. In SMPS applications, the FET normally switches between the linear region (VDS << VGS - VTH, constant rds_on) and cutoff (VGS < VTH) and spends very short periods of time in saturation when switching between these two states. That being said, SOA is not nearly as important for discrete FETs in SMPS applications. However, it can be used as a measure of robustness. More important in these applications is BVDSS, rds(on), QG, QGD and QGS.
Our power block devices take a different approach to SOA as they are designed for switch-mode applications such as power supplies and motor drives. In this case, the SOA curves plot output current vs. temperature (ambient and/or PCB) and are derived from power loss and thermal impedance data with the power block operating in an actual application circuit (sync buck or half bridge). The power block datasheet includes detailed application information how to use this information in a specific design. Hope this helps. Please let me know if you have additional questions.
Links: