Hi guys,
since Cyclone 10 is not on ti.com/fpga yet can you recommend an efficient step-down for supplying the following 2 rails: 1.2 V core voltage for an Altera (Intel) Cyclone 10 LP and 3.3V for a LVDS Deserializer? The requirements are the following:
- Vin = 5 V
- Vcore = 1.2 V @ 3 A
- Vlvds = 3.3 V @ 3 A
Thank you,
Franz