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TPS7A7100: PG statue when EN=0

Lin_Charles
Expert 4260 points
Part Number: TPS7A7100

Hi team,

   When EN=0, and I pull up PG to VCC, how about the statue of this pin? Will it be in low state or follow the VCC signal? Thanks.

  • 0
    TI__Guru 55940 points

    Hi ,

    PG is the open drain output of a voltage detector.  The output voltage must be pulled up to a voltage in order to generate a logic high signal when the internal pulldown FET is OFF; however, this voltage used as the pullup will not impact the function of the voltage detector.  When Vout is less than Vit(pg) + Vhys(pg), the PG output will be logic low.  As such, when the regulator is disabled, PG will be logic low.

    Very Respectfully,

    Ryan