Hi Team,
My customer understood TPS3824 opperate;
1. WDI signal is asserted before td when power up sequence, ^RESET is still "Low" output.
2. When WDI is stopped, ^RESET will be "High" outpt after td.
3. RESET and ^RESET signal keep inverting depend on WDI.
In this case, Is td value specified(max 300ms) in above condition as well?
Regards,
Kotaro Yamashita
