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TPS2373: About the Pin processing method

Part Number: TPS2373
Other Parts Discussed in Thread: TPS2372, PMP20859

Hi

My customer has question.


1. If you do not use VCIN / VCOUT, what pin processing is desirable?
 I do not know what "low voltage bias" described in the data sheet refers to.

2. "CBULK Blocking Diode" listed in [Table 5] of the data sheet
 What does it show? Is it a TVS connected in parallel with CBULK?

Regard

T Kishi

  • Hi T Kishi,

    1. If advanced startup feature is not desirable then I recommend the TPS2372 which doesn't have the advanced startup feature. Or if the TPS2373 is necessary, you can simply have a 1uF cap on VCOUT. Then for VCIN, you can have a resistor zener clamp above the VCIN threshold and drive it from the VDD rail. Be sure VCOUT does not have any load.

    2. Alot of designs will not have a blocking diode but an example is having a diode on RTN (cathode) and ground of bulk cap (annode). An example is shown in PMP20859; again the diode is placed for very specific applications.

  • Hi Darwin

    Thank you for reply.

    When the VCIN terminal is not used, it is necessary to apply a voltage of 9.0V(MAX) <VCIN <15 V.
    Also, VCOUT only connects a 1uF capacitor between VCOUT and RTN.
    Is this understanding correct?

    Regard

    T Kishi

  • Hi T Kishi,

    Yes VCIN must be above VCIN threshold for the PD to work correctly. Many designs will use a VDD to resistor to zener to RTN to regulate a voltage on VCIN.

    Yes VCOUT with 1uF to RTN is only connection. Nothing else should connect to VCOUT so that the zener solution on VCIN doesn't get loaded.

    Otherwise, TPS2372 removes advanced startup (VCIN/VCOUT) and it can be used without the above recommendations.