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UCC27712EVM-287: 2.2 ohm resistor on Vcc is a significant source of loss when low-side gate turns on?

Sean Broderick
Prodigy 10 points
Part Number: UCC27712EVM-287

I was doing testing with this eval board and found my synchronous buck supply was failing to regulate under both high load or high input voltage conditions. I was sometimes triggering the UVLO for the Vboot and the Vdd. Vdd was dropping down to 8V.

What I found was that I had a steady 4V drop across R1 when I supplied 12V to Vcc. It appeared that since Vdd fed both U1 and the Vboot diode (and R2), Vdd never recovered since a gate is always being driven. 1.8A from the measured 4V drop is within nominal drive current for the chip. 

Why is a 2.2 resistor used? It seems high considering peak current of the driver. Wouldn't it be better to split up Vcc to feed Vboot and Vdd first before the resistors? Then the caps can recover the rail when the other side is active?

Please note, I only see this behavior under load, so it indicates the drive current being the culprit. Bypassing the R1 resistor improved performance under high input voltage conditions indicating that the low side was turning on correctly.

  • 0
    TI__Mastermind 21935 points

    Hello Sean,

    I am an applications engineer for the high power drivers and can help with your questions. The VDD pin has significant capacitance which is after the 2.2 Ohm resistor. The VDD capacitance significantly exceeds the energy storage required to charge the low side FET Qg and also energy to recharge the boot capacitance. So the voltage drop from charging the MOSFETs Qg should be very low.

    The gate drive output peak current only exists for a short time during the Vgs rise time charging the MOSFET Qg. The 2.2 Ohms should allow the VDD capacitance adequate time to recharge the VDD capacitance voltage between gate drive peaks.

    The resistance is there mainly in the case where there may be noise coupled from the external supply long leads. There should be no concerns if you want to short this resistor, although it should only exhibit voltage drop relative to the average current on VDD, which should be insignificant.

    Please confirm if this addresses your questions, or you can post additional questions on this thread.

    Regards,