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ISO5852S: PCB layout considerations for ISO5852S.

Part Number: ISO5852S

Dear sir,

ISO5852S design layout suggest to proceed with 4 layer pcb.

Due to urgency, we are planning to design the ISO5852S based inverter  gate driver board based on two layer PCB.

What are the effects we Will face in the two layer PCB?

Shall we try with two layer pcb for inverter application or do we need to proceed with only 4 layer pcb. Kindly request to guide us to proceed further.

Thanking you.

Thanks & regards,

Rajasekaran.

  • Hi Rajasekaran,

    The datasheet recommends that a 4-layer board is used to minimize the potential for EMI disturbances. Using a 4-layer board allows you to use large copper planes for the ground and power signals and gives you more options for routing the rest of the signals. It is possible to design the driver board on a 2-layer PCB but you will sacrifice the benefits of a large ground plane and will make routing more challenging. 

    Even with the 2-layer board, you should follow the Layout Guidelines in section 12.1 of the datasheet as closely as possible.

    Primary considerations are:

    - To minimize the distance between OUTH/OUTL to the gate pin of your power switch.

    - To maximize the amount of copper you use for the COM plane.

    - Place the bypass capacitor(s) for VDD and VEE as closely as possible to the driver IC.

    - Use as much copper as possible for the power planes, VDD and VEE. 

    - To route OUTH/L and DESAT on the top layer.

    Regards,

    Audrey

  • Dear sir,

    Thanks for your guidance.

    Thanks & regards,

    Rajasekaran.