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TPS63031 - Efficiency at low output current

Other Parts Discussed in Thread: TPS63031

Hi Milos 

1.What is the efficiency curve when the load is 1μA~100μA? Only 100μA or more of relevant data is available in the manual.

2.Does the chip have minimum load requirements? If the load is about 1μA most of the time, what should I pay attention to?

   What is the current value of VOUT in the description of the quiescent current in the manual? Typical value 4μA, maximum 6μA,

Best regards,
Rengui

  • Hi Sun,

    At very low output currents, the efficiency starts to depend significantly on external components. I suggest you to check this application note for understanding what Iq is and how it affects the efficiency:

    http://www.ti.com/lit/an/slyt412/slyt412.pdf

    A close approximation for the input current is:

    Ii=Iq_in+(Io+Iq_out)*Vo/Vi/eff=25µA+((Io+4µA)*Vo)/Vi/0.8,

    and then calculate the effective efficiency as:

    η=Pi/Po=(Vi*Ii)/(Vo*Io)

    1. For the TPS63031, a close approximation is that the efficiency drops down linearly (in log scale) from 65% to 0%, for Io=100 µA down to 1 µA.
    2. There is no minimum load requirement for the TPS63031 (or any other TPS63xxx device to date). If your load is 1 µA most of the time, aim for the device with lowest Iq, and external components with lowest losses and leakage currents.
    3. Iq for VOUT is the supply current required by the device from the output side. This is not the load current, although, from the input side, it looks like a load current. This is explained in the above mentioned application note.

    Best regards,

    Milos