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TPS92518HV: Calculating Power Dissipation with different switching frequency/voltages/currents

Nicholas Carley
Genius 9975 points
Part Number: TPS92518HV
Other Parts Discussed in Thread: TPS92518

Hello,

I have a customer looking to calculate the power dissipation of the TPS92518HV with different switching frequencies, voltages, and currents. Looking in the datasheet and the GUI design tool I don't see anything for calculating power dissipation. I only see the package thermal information.

Any advice?

Thanks,
Nick

  • 0
    TI__Mastermind 28655 points

    Hello Nick,

    It may be easier if I know what they are doing.

    I will list some of the main things to sum up:

    Iin, not switching, 3 mA typical, multiply this by the input voltage to get DC bias power loss, example, Vin = 50V, Pdiss = 150 mW

    If VCC or Vref has any additional loading this is generated by Vin linear regulated.  Any current draw from either needs to be multiplied by Vin for TPS92518 power dissipation

    TPS92518 gate drive.  This is also generated from Vin.  For turn-on it is basically being pull up to VCC however VCC is generated from Vin.  For turn-off it is being pulled to ground.  The power dissipation for switching will be approximately the Qgate(tot) of the MOSFET being used times Vin times switching frequency.  Example would be a 20 nC total gate charge switching at 400 KHz when Vin is 50V = (20 nC)*(400 KHz)*(50V) = 400 mW.  This is for one channel.  If both are running this doubles to 800 mW.

    Most likely the largest contributor to power dissipation will be the gate drive for the TPS92518.

    Best Regards,

  • 0 in reply to Irwin Nederbragt
    TI__Genius 9975 points

    Thanks. I think we can figure out power usage and thermal dissipation from what you sent.

    That value for converter efficiency is inversely proportional to the LEDx_TOFF_DAC register value. A small change in efficiency makes a significant difference in the register value.

    The problem is: I have no idea what the efficiency will be. I know that it's higher for lower voltage drops across the 92518 and when you get close to saturation it approaches 1.0. But to keep the converter at a safe operating frequency, I need to know that value. I guess typically, the engineer would test in his application, determine efficiency and adjust TOFF_DAC to get the desired frequency / ripple. But that won't work for me as our outputs can drive anywhere from 12 VDC to 54 VDC.

    Do we have a suggestion for determining efficiency?

    Thanks,
    Nick

  • 0 in reply to Nicholas Carley
    TI__Mastermind 28655 points

    Hello Nick,

    To determine efficiency requires calculating all of the losses.  The main portions of this are the losses of the TPS92518 (linear from Vin, the IC bias and the gate drive as mentioned before), RDSon loss of the MOSFET, the freewheel diode loss, switching loss, inductor core loss and conduction loss as well as any other losses in the system both AC and DC (capacitors can have AC losses for example).

    At a fixed operating current in continuous conduction mode and similar switching frequency the switching losses should stay somewhat constant.  The duty cycle will change the conduction loss of the MOSFET (goes down with lower output voltage) and the freewheel diode conduction time losses (will go up when Vout goes lower).  The efficiency drops because a lot of the losses are fixed and the output power is reduced.

    At higher switching frequencies the switching losses may (most likely) start to dominate.  Choosing the correct MOSFET for your application is important.  To optimize the MOSFET will be different for a low frequency design versus a high frequency design, same with the inductor and inductor value.

    The easier method would be to measure your efficiency at different operating points.

    I will be on extended leave after today, FYI, so someone else will be picking this up.

    Best Regards,