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UCC21750: UVLO at VEE?

Lukas Jani
Prodigy 180 points
Part Number: UCC21750

Hello,

in the Datasheet at the Topic 8.3.3 about the undervoltage lockout, it is stated:

The typical VDD value of IGBT is 15V, and the typical VDD value of SiC MOSFET is 18V or 20V. UCC21750 implements 12V threshold voltage of VDD UVLO, with 800mV hysteresis; -3V threshold voltage of VEE UVLO, with 400mV hysteresis. This threshold voltage is suitable for both SiC MOSFET and IGBT.

There is no other info about a UVLO-Protection at the negative Side VEE, not in the tables, not in the introduction. Does the UCC21750 do have a negative UVLO-Protection? Or is this an errata?

Thanks a lot!

  • 0
    TI__Expert 4875 points

    Hello Lukas, 

    Thank you for your question. The VEE UVLO is not a feature of UCC21750. The statement you have pointed out will not be shown in the final and non-Advance Information datasheet.

    This device does have VCC and VDD UVLO. The VDD UVLO has the benefit of being referenced to COM, as opposed to VEE, so that the gate voltage is always sufficiently above the IGBT or SiC MOSFET's threshold voltage.

    Regards,

    Audrey