Other Parts Discussed in Thread: TPS1663
I know the maximum withstand voltage is 48V. But we need to support up to 60V may be for short time. Can we use a protection circuit using zener by which the chip GND will be elevated and maximum voltage across logic area (area other than MOSFET inside the chip) will be around 5V only. Load GND will be different from chip GND. Control / status signals are fed through opto-coupler to refer to chip GND. Will it work this way? Voltage between VSx and OUTx can be 60V?