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LMR16006: Trace spacing

Part Number: LMR16006
After reading various white papers and datasheets on buck converters, I'm left with a question regarding trace size / spacing. The TI AN 1149 indicates to make the power traces as thick as possible and the EVM board illustrates this as well with fairly large pours for VIN, VOUT and GND and it seems that the spacing between those pour areas is pretty much dictated by pad spacing of components. However, in other white papers (published by "others") I have found guidance that traces not be overly thick and that spacing between be kept wide - for instance, maximum spacing between the inductor's pads. I've also seen in some successful designs using TI parts that the spacing between the inductor pads as basically as MIN as physically possible. I'm just wondering if there is a industry standard here? Thanks
  • James,

    Thick traces give lower DC resistance which is good for high-current circuits like power circuits.

    However, any loop with discontinuous current (input of a buck for example) should have a small loop to minimize the parasitic inductance which leads to ringing, noise, and possibly regulation issues. It may be difficult to have a small loop with thick traces which is where the ambiguity/tradeoffs come in.

    You also have to consider noise coupling. One side of the inductor is the switch node (very noisy) and the other side is VOUT (ideally DC, very quiet). Placing these nodes closer on the layout will increase the parasitic capacitance between them thus increasing noise coupling. This is why you'd want to maximize the distance between these nodes.

    Those are the main considerations. Let me know if you'd like me to clarify any points.

    -Sam

  • James,

    And to address your actual question - I do not know of any industry standards. Just lots of rules of thumb which often contradict each other. Best practices also come with experience.

    -Sam

  • Sam, Thanks for all the feedback. Very constructive. James