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TPS2121: Input channel selection and ST pin

user5834448
Prodigy 140 points
Part Number: TPS2121

Hi team,

I'm checking about Input channel selection and ST pin with TPS2121EVM-023.

Fig.1 is my circuit and Fig.2 is my environment.

I operated that IN2 was valid after IN1 was valid.

I guessed the IN2 was selected and ST was low because CP2 was higher than PR1.

Datasheet (excerpt):

>If PR1 > CP2 then IN1 is used, and if PR1 < CP2 then IN2 is used.

>ST is pulled high when the output is Hi-Z or IN1. It is pulled low when IN2 is powering the output.

However, according to Fig.3 and Fig.4, IN1 still loaded current (3A) even though ST pin was low.

How come this situation occurred?

Fig.1 Circuit :

Fig.2 Environment:

Fig.3: Oscilloscope

Fig.4: Electronic Load

  • 0
    TI__Mastermind 32650 points

    Hi user,

    This is unexpected behavior of the device. I will recreate your setup and perform the test and get back to you as soon as I can.

  • 0 in reply to Shreyas Dmello
    Prodigy 140 points

    Dear Shreyas,

    Thank you for your response.

    I'm waiting for your answer.

    Best regards,

    Kensho

  • 0 in reply to user5834448
    TI__Mastermind 32650 points

    Hi Kensho,

    While I am trying to get my hands on an EVM, is it possible for your to re-run this test but with a higher voltage on the CP2 pin? By my calculation the voltage on CP2 is around 1.059V but if possible could you change the lower resistor to up the voltage higher than 1.1V? If possible a voltage of 1.2V would be preferred. 

    This will help to eliminate variation between devices for testing as we specify 1.1V as a maximum on Vref. 

  • 0 in reply to Shreyas Dmello
    TI__Mastermind 32650 points

    Hi Kensho,

    I talked to a few designers about your issue and my inclinations were confirmed. The voltage on the CP2 pin is not sufficient to flip channels.

    ST indicates which channel is enabled in steady state after soft start operation is done. When both  PR1<VREF and CP2<VREF, both channels are enabled when VIN1 and VIN2 are close to each other( within +/-600mV of each other) and the highest of the two(VIN1 in this case) is passed to VOUT using an ideal diode operation. The system will stay in ideal diode mode passing the highest to VOUT until VIN2>=VIN1. As a result, VIN1 is passed to VOUT even though both channels are enabled. ST is going low because both channels are enabled.

    I think if you increase the voltage on the CP2 pin, the part will work as expected

  • 0 in reply to Shreyas Dmello
    Prodigy 140 points

    Dear Shreyas,

    Thank you for your answer. As you told me, CP2 was around 1.06V.

    However, it still seems that IN1 is selected even though CP2 is higher than 1.1V.

    I changed R17 from 27k to 30k and keep 470k at R10.

    ( CP2 = 19.5V * 30kohm / (30kohm + 470kohm) = 1.17V )

    As shown in Fig.1, IN1 is selected even though CP2 is higher than 1.1V.

    Do you have any other suggestion?

    Fig.1:

    Red:Output, Yellow:IN1, Blue:IN2, Green:CP2

    Best regards,

    Kensho

  • 0 in reply to user5834448
    TI__Mastermind 32650 points

    Hi Kensho,

    In your output waveform, there is a voltage drop soon after turn on? Can you probe ST and make sure that it is not flipping channels here? Also, is there any change on the power supply from before?

    I have EVMs on hand with me so I can now perform the testing. Can you help me understand your testing sequence? Let me know if I am understanding this correctly.

    1. You are shorting PR1 to GND and putting in place all the other jumpers.

    2. you are turning on IN1 to 20V while keeping IN2 off

    3. then you are turning  on IN2 and with the CP2 voltage now being higher than Vref, you are expecting the device to flip to IN2.

    4. You are checking for this flip on the output voltage seen/current supplied by IN2.

    Once you confirm this setup, I will go ahead and try to recreate this in the lab. 

    I will build a similar setup except that I will use a power resistor of about 7Ohms so I will have slightly less than 3A flowing through the circuit. 

  • 0 in reply to Shreyas Dmello
    Prodigy 140 points

     

    Dear Shreyas,

     

    Thank you for your response.

     

    >In your output waveform, there is a voltage drop soon after turn on? Is this a result of your setup?

    Electronic load device starts to load current (3A) by putting a load button.

    That's why the output voltage drops after turning on.

     

    >I have EVMs on hand with me so I can now perform the testing. Can you help me understand your testing sequence? Let me know if I am understanding this correctly.

    Your recognition is all correct.

     

    Best regards,

    Kensho

  • 0 in reply to user5834448
    TI__Mastermind 32650 points

    Hi Kensho,

    I have looked over your previous issues and your circuit as well and have come to some conclusions on the way you are using this device which will affect your design. For reference, I am using the EVM.

    It is easier to prioritize IN1 over IN2 using PR1. I was able to mux between the two inputs by placing the 20V supply on IN2 and 19.5V on IN1. I am using the jumper J3 to set the PR1 voltage and and removing all jumpers on CP2 except for J13. This pulls down CP2 to ground. I have also left all OV pins pulled to ground. As long as the voltage on OV is lower than Vref, overvoltage protection is not triggered.

    In this mode of operation, when IN2 is present but IN1 is invalid, the device uses VREF mode to send IN2 to the output. As soon as IN1 is connected, and the voltage on PR1 is goes higher than Vref, the device prioritizes IN1 over IN2. As long as PR1 is greater than Vref(in the case that CP2 is pulled low), the device will prioritize IN1.

     

    I recommend revisiting this design where the inputs are exchanged and to use PR1 to set priority rather than using CP2. 

    My setup did have some non-idealities but remember that with such a high load current, the device might hit thermal shutdown during the inrush phase. I would recommend decreasing the output capacitance as a way of countering this. I would also recommend decreasing the SS cap or leaving the SS pin floating. Channel selection does not work before the supply settling time and may cause some undesired behavior. Do note that with a smaller SS cap and with high output capacitance, the inrush current is further increased.

    Thank you for using TI Power Switches in your designs. 

  • 0 in reply to Shreyas Dmello
    Prodigy 140 points

    Hi Shreyas,

    Thank you for your suggestion.

    Firstly, I would like to prioritize IN2 because of a positional relationship between TPS2121 and connectors which power sources are provided from. However, as a result of consideration with a circuit pattern designer, I could exchange the inputs and use PR1 to set priority.

    You recommend I should decease output capacitance but Vdip will be higher during switching. That's why I would like to mount 33uF*3 at first.

    On the other hand, I follow your advice about SS cap. I change it from 0.1uF to 1uF.

    I redesigned my circuit  on http://e2e.ti.com/support/power-management/f/196/t/827475. Please review my circuit again.

    Also, I checked the logic with EVM following your advice. However it still seems that IN2 is selected in the following case you tested.

    In this mode of operation, when IN2 is present but IN1 is invalid, the device uses VREF mode to send IN2 to the output. As soon as IN1 is connected, and the voltage on PR1 is goes higher than Vref, the device prioritizes IN1 over IN2. As long as PR1 is greater than Vref(in the case that CP2 is pulled low), the device will prioritize IN1.

    I attached my EVM and signals.

    Fig2:

    Yellow: IN1 (+19.5V)  Blue:IN2 (+20V),  Red: Output  Green: PR1

    Best regards,

    Kensho

  • 0 in reply to user5834448
    TI__Mastermind 32650 points

    It looks like R17 is depopulated. Can you make sure that CP2 is grounded?

    I was able to mux between the outputs. I shall post a picture of my board and jumper connections as well as a scopeshot if you are still having trouble.

  • 0 in reply to Shreyas Dmello
    Prodigy 140 points

    Dear Shreyas,

    Could you please post a picture of your board and jumper connections as well as a scopeshot?

    Best regards,

    Kensho

  • 0 in reply to user5834448
    TI__Mastermind 32650 points

    Hi Kensho,

    Here is a picture of my EVM:

    Here is my scopeshot:

    As you can see, I have successfully muxed the power rails in this configuration. Do note that the PR1 voltage dividers are not set correctly for 19.5V and 20V operation so the voltage on PR1 rises above Vref earlier causing the mux to happen earlier. Also note that due to the non-idealities in my setup, the voltage seen on the board is a little lower than what is output from both supplies. I used a power resistor for this application and the load current I ran this at was at 2.7A. This was the closest I could get to your 3A current draw due to the precision of my power resistor.

    To reiterate IN1=19.5V and IN2=20V. CP2 is pulled down through R17. PR1 uses the 12V voltage divider network on the board.

    If you have not changed any resistors on the PR1 voltage divider network, this is the exact operation you should see.