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BQ25703A: Charging super-cap with power path

Eddie Koh
Genius 10595 points
Part Number: BQ25703A
Other Parts Discussed in Thread: CSD25402Q3A

Customer trying to design BQ25703A for charging super-cap with a power path to system. Here are some questions to clarify:

  1. How to configure the output voltage at pin22(VSYS)?
    1. E.g. If we want to tune VSYS to 3.8V (fixed), how to configure? 
  2. The super cap is used as UPS for the MCU in our system. If I set CELL_BATPRESZ to 25% of VDDA, then the default setting of VSYSMIN = 3.584 V, and VBAT = 4.192 V. This means once valid VBUS comes, will VSYS quickly surge to 3.584V and gradually charge up to 4.192V?
  3. Once input power is lost, VSYS will follow VBAT, and VSYS=VBAT-Iload*RonBATFET?
    1. Would V/BATDRV=VSYS-10V=-6.2V initially? Can V/BATDRV generate -6.2V?
  4. If charge current ICHG is set to 0A, the system load can still be powered through VSYS pin by VBUS? Means, charge current setting will not affect the load current?

  • 0
    TI__Expert 5330 points

    Hello Eddie,

    1. How to configure the output voltage at pin22(VSYS)?

    1. E.g. If we want to tune VSYS to 3.8V (fixed), how to configure? 

    It is possible to get a fixed VSYS output voltage on this device, but only under specific conditions, which I don't believe will be met in all of your use cases.  The BQ25703A employs the Narrow Voltage DC (NVDC) architecture.  In this architecture, VSYS is typically regulated a few hundred millivolts above the battery voltage.  This is true whether or not charging is active.  

    If the battery (or supercap) is charged below the desired VSYS value, then it is true that you can set VSYSMIN to the desired value and it will regulate at a fixed output of VSYSMIN.  This is not the common usage, however, because charging is greatly reduced in this state.  The BATFET has to operate in LDO mode in order to maintain a larger voltage difference between SYS and BATT, which reduces the current that it will charge at. 

    As soon as the battery or supercap voltage rises above VSYSMIN, the SYS voltage will rise with it.  Because of the backgate diode on the BATFET, it is not possible for the SYS rail to be significantly below the battery voltage.    

    1. The super cap is used as UPS for the MCU in our system. If I set CELL_BATPRESZ to 25% of VDDA, then the default setting of VSYSMIN = 3.584 V, and VBAT = 4.192 V. This means once valid VBUS comes, will VSYS quickly surge to 3.584V and gradually charge up to 4.192V?

    Assuming your Supercap is fully discharged, the switching regulator will regulate at VSYSMIN while the BATFET charges the supercap in LDO mode.  Once the supercap reaches the VSYSMIN, the SYS voltage will be maintained above the battery voltage according to the R_DSON of the BATFET and the charging current.

    1. Once input power is lost, VSYS will follow VBAT, and VSYS=VBAT-Iload*RonBATFET?
      1. Would V/BATDRV=VSYS-10V=-6.2V initially? Can V/BATDRV generate -6.2V?

      Yes, once adapter is removed, VSYS is driven directly off the battery and will have battery voltage minus the IR drop across the BATFET. 

                The BATDRV does not go below ground.  You will notice that the CSD25402Q3A PFET used on the EVM has a threshold voltage of -0.9V and a maximum G-S voltage of +/- 12V.  Since BATDRV is VSYS - 10V when this would not be below GND, you can use a FET with a max G-S of 12V, but you still need a relatively low threshold voltage for the reason you are asking about.

    1. If charge current ICHG is set to 0A, the system load can still be powered through VSYS pin by VBUS? Means, charge current setting will not affect the load current?

    Yes, with the NVDC architecture, the switching regulator runs even when charging is disabled in order to convert adapter voltage to system voltage, so you can still provide system power from the adapter when charging is disabled.

    Regards,

    Steve