LM5116EVAL: Gate pulses are missing at certain load levels

Hi Tim -Thanks for responding to my question!

Update:  I was able to resolve the missing gate pulse issue by reducing the sw inductor to 15uH -but am not sure why this helped.  The ckt behavior is MUCH improved, but still a little quirky (see below).  

Schem, Webench  report and Quickstart are attached.

Thanks!.....Alan

LM5116_quickstart_28V_spreadsheet.xls48 to 28v Design.pdfSMPS schem..pdf

Yellow:  Inductor/switch voltage

Green: Lower FET gate drive

Vin=44VDC, Load: 2.0A

Hi Timothy,

Changed  C113/C114, R74  to 2.6nF, 33p, 24K  quickstart values.  Also changed C45, 1uF/100V ceramic to a 10uF/50V cap (filtering seems ok, see below).  I also isolated/fly-wired the output inductor&cap onto the input cap to provide better/shorter ground paths.  Unfortunately, no stability improvement was obtained via any of these changes.  Any other suggestions?

Thanks!.......Alan

Hi Timothy,

The transient response seems pretty good (see attached).  I sent you a link to the design files in a PM.  The output ripple appears stable cuz it was a one-shot capture.   

Thanks for your assistance -much appreciated!.......Alan

Loading = 0.5/1.0A

Hi Tim,

Was wondering if you had any other suggestions concerning this issue?

Thanks!......Alan

Hi Alan,

What is the ESR of the output cap (as this sets an ESR zero)?

Depending on the ESR zero, C114 of 300pF between COMP and FB in your original schematic seemed high as it sets a 15kHz pole when breaking with R74 (36.5k) compensation resistor. However, I see above you tried with different compensation values.

Another recommendation is to add a small RC filter at the VIN pin of the IC (e.g. 10Ohms and 47nF/100V).

In terns of layout, please ensure the current sense lines from the shunt to the controller are routed tightly and away from noisy nodes such as SW and LO (add a 50ns RC filter on the CS lines if needed). The feedback and compensation components should be close to their respective pins. Also, the ceramic input cap(s) should be as close as possible to the MOSFETs. More details are found in the layout section of the LM5116 datasheet.

Regards,

Tim 

Hi Tim,

Argh!  Have been blowing up a lot of LM5116s and lower FETs while trying to solve this thing!

Bad news: have tried most of your suggestions and nothing seems to improve the situation (haven't tried changing the input filter yet).  I thought changing the output inductor had solved the issue, but that verdict seems to have been premature.

Good news (kinda): I think the issue is related to when the SMPS transitions from discontinuous to continuous mode.  At light loads, the ckt seems stable/normal.  As the load is increased, the gate pulses on the lower FET become erratic (some will be missing).  If allowed to run in this condition, eventually the the 5116 and/or lower FET will fail. At heavier loads, the operation becomes normal on the eval board, but is still somewhat erratic on our company design (see below).  This is a video that shows the situation (had to replace the lower FET shortly after this was shot). 

Next, I think I'll try adding a snubber across the lower FET.  Hopefully the behavior described above will give you an idea how to cure this issue.

Thanks!.......Alan

Update:  After trying many things to correct the missing lower gate drive pulses , I tried switching the IC from diode emulation mode to fully synchronous mode.  This seems to have cured the missing gate drive issue that occurs when switching from DCM to CM modes.  I'm not really sure what the intended purpose of the DEMB pin is.  Can you explain?

For the DEMB pin, the datasheet states: For start-up into a pre-biased load, tie this pin to ground at the CSG connection.  What is a "pre-biased load"?

New Issue:  Now the supply seems to function mostly normally (still have some PWM irregularity, see pic above).  But when a 1.5 to 2A load is applied the lower FET and/or the 5116 will fail.  I've tried adding TVS diodes across its D-S and G-S pins.  Its an 80v FET.  The source voltage is 48V -maybe need higher rating?  FYI, we're using the same design, IC and FETs in a  48v to 12v design with no issues.  -This aspect made me heavily suspect these problems were layout-related -but I've tried many modifications that have not made any improvement.

Belated answer to your previous question:  the output cap is: Panasonic 63SXV33, 33uF, 63v, ESR=25mohms.

Thank you for your assistance....Alan