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TPS25940-Q1: Integrated comparator and the inversion circuit R6 and Q1

Wendy Wang1
Genius 17110 points
Part Number: TPS25940-Q1

Hi,

I have read the document http://www.ti.com/lit/ug/slva726/slva726.pdf. It introduces a supercapacitor backup power supply solution.

It need a hysteresis comparator to control the charger to stop and start charging.

And in page 4, it says that "The design in this document, shown in Figure 2, uses a comparator which is integrated in the TPS25940A
device. Because the comparator output of the TPS25940A is inverted, an additional inversion of the signal is necessary, which is achieved by R6 and Q1."

Actually, I'm not sure whether the hysteresis comparator means the one on the PGTH pin. And how do R6 and Q1 realize the inversion?

  • 0
    TI__Guru** 105531 points

    Hi Wang,

    Yes. In that configuration, the hysteresis of PGTH comparator of TPS25940A is applicable.

    During super cap charging, Vc increases, which increases VTH  as well. When VTH crosses PGTH threshold (0.99V), the PGOOD becomes HIGH to make VPS_bar = HIGH. This turns ON Q1 to make VPS = LOW to enable the TPS63020DSJ device.

    vice-versa happens when PGTH falls below 0.92V to disable TPS63020DSJ device.

    Best Regards,

    Rakesh

  • 0 in reply to Rakesh
    TI__Genius 17110 points

    Hi Rakesh,

    Thank you for your reply. I don't understand why the TPS63020DSJ device is enabled when  VPS = LOW?

    Thanks&Best Regards,

    Wenxiu

  • 0 in reply to Wendy Wang1
    TI__Guru** 105531 points

    Hi Wang,

    I think, I overlooked TPS63020DSJ  device. 

    VPS  signal enables/disables the power save mode of TPS63020DSJ. In figure-2 (http://www.ti.com/lit/ug/slva726/slva726.pdf) TPS63020DSJ is always in enable state as EN is tied to Vin.

    BR, Rakesh

  • 0 in reply to Rakesh
    TI__Genius 17110 points

    Hi Rakesh,

    Why can VPS  signal enable/disable the power save mode of TPS63020DSJ? I think the Vout of TPS63020DSJ has no relationship with R6 and VPS.  This problem of boost always puzzles me .

    Thanks&Best Regards,

    Wenxiu

  • 0 in reply to Wendy Wang1
    TI__Guru** 105531 points

    Hi Wang,

    In this design, the TPS63020DSJ is forced to operate in low power mode when VMAIN is available -> to minimizes switching loss in TPS63020DSJ.

    The logic is as follows (refer Figure-2 in TIDA document):

    VPS_bar becomes HIGH only when VMAIN is available AND super cap VC is charged beyond VTH. This leads VPS to be LOW to force TPS63020DSJ in low power mode of operation. Which makes sense as VMAIN is available to power the load at VSYS.

    Correct. Vout of TPS63020DSJ has no relationship with R6 and VPS. As discussed above, we are interested to minimize power loss in TPS63020DSJ by operating in low power mode when VMAIN is available.

    BR, Rakesh

  • 0 in reply to Rakesh
    TI__Guru** 105531 points

    Hi Wang,

    Does the above explanation clarifies you ?

    BR, Rakesh