Other Parts Discussed in Thread: CSD19537Q3,
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Hi Changwoon,
Do you mean that Vout and GATE stays high even if UVEN is forced '0' ?
Can you share some test waveforms
Also, send me filled up design calculator. It is available at http://www.ti.com/product/TPS2493/toolssoftware
BR, Rakesh
I'm sorry for late reply.
The measurement waveform you requested has not yet proceeded.
Hi Changwoon,
Yes, it is possible to get controller also damage during the process. A damaged/ failed FET would put stress on the GATE section of the controller TPS2493.
BR, Rakesh