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LM5036: LM5036 issue

Part Number: LM5036

Question list
1: Current sampling and overcurrent protection settings related issues
2: Auxiliary power supply buck voltage related issues

Problem Description
1. Current sampling and overcurrent protection setting problem

A. Product design parameters
Vin=36-75V, V0=12V, P0=400W (Imax=33A)

B. Corresponding schematic parameters are as follows

1. CS_NEG resistance to ground: R926=680ohms

2. Resistance between CS_POS and current sampling point CS: R925=680ohms

3. CS_SET setting resistance: R927=20Kohms

(The above corresponding overcurrent point is 39A, Vin high and low voltage difference is 3A; when R927=18kohms, the overcurrent point is 42A)

4. SSSR secondary soft start setting capacitor: C909=0.22uF

C: The problem to be solved is as follows

(1). Problem one : Synchronous rectification duty cycle rise process V0 power down problem

The C909 setting will affect the overcurrent protection snoring output, and affect the light load output voltage of Io<4A as shown in Table 1.

C909=0.1uF, light load (when the output is loaded with <4A), the output voltage is powered down (Figure 1, Io=2A)

Analysis:

The above problem has been analyzed. If the SSSR pin capacitance is set too small, the light load output voltage Vo of Io<4A will be powered down. The reason is that the synchronous rectifier is switched from diode rectification to synchronous rectification, and the power stage filter inductor current is off. DCM enters CCM which consumes the energy of the output. To solve this problem, the SSSRG pin capacitor C909 needs to be increased (C909>0.22uF), but it contradicts the problem 2 below.----How to solve the problem of Vo power failure during the rising cycle of synchronous rectification?


     chart 1 is to reduce the output voltage dropout of C909 to 0.1uF under light load conditions.(Yellow: Synchronous rectification soft start SSSR voltage,Blue: output voltage)

(2). Question two: how to control overcurrent protection snoring time

The C909 setting affects the overcurrent protection snoring output and affects the Io<4A light load output voltage (see Table 1).

C909=0.22uF, the light load output voltage is normal, and the output voltage time is fixed at 80-100ms (Figure 2).

C909=1uF, the output voltage time can be shortened to 30ms (Figure 3), and then continue to lower C909, the output voltage time has not changed significantly, further analysis, the over-current protection snoring Vo duration and C909 (SSSR capacitance) rise The time is consistent (Figure 4)

C901 (RES Snoring time period setting capacitor) needs to start charging after the SSSR capacitor is fully charged (combined with Figure 4 and Figure 5)

Analysis:

During the overcurrent process, the RES pin response is related to the SSSR. The RES timing time follows the SSSR rise to the reference voltage time. By increasing the RES pin capacitance C901, the snoring has no duty cycle output time, but the duty cycle output cannot be effectively changed. time

The overcurrent protection snoring cycle is related to SSSR. Is it still related to SS? If the SSSR capacitor is too large, the Vo oscillation time will be lengthened, resulting in MOS heating, voltage and current surge, and the reduction (no change under 0.01uF, oscillation time 30ms) will occur when the output starts to be powered down. How to control the duration of Vo during overcurrent? According to the datasheet description, the duty cycle is only related to the RES value. How should the value be used?----How to solve the problem that the output voltage Vo of the snoring process lasts too long?


(Figure 2 shows the change of the snoring time after adjusting the C901 RES capacitance without changing the output voltage duration.)---yellow is output voltage


(Figure 3 is to adjust the C901 SSSR capacitor 0.01uF, the output voltage duration is reduced to 30ms)---yellow is output voltage


(Table 1 Overcurrent parameter setting and phenomenon relationship)


Figure 4 shows the relationship between C909 (SSSR capacitor) charging and output voltage Vo.---yellow is C909 voltage,blue is Vo


Figure 5 shows the relationship between C901 (RES capacitor) voltage and output voltage Vo.---yellow is C901 voltage ,bule is Vo

(3). Question three:How to interpret the output voltage clamp when overcurrent protection

During the overcurrent protection process, the output voltage Vo during the snoring process first rises to 10V and drops to 8V (combined with Figure 4 and Figure 5), and does not rise to the output voltage setting of 12V, and cannot analyze why it rises to 10V and falls to 8V,Why does Vo fall directly to 8V (hold) and then turn off after rising to 10V, instead of going directly to 12V and then shutting down? So what is the reason for rising to 10V and dropping to 8V?----How to explain the phenomenon that the output voltage of the snoring process is clamped at 10V/8V?

(4). Question four:about CS settings

a. Why is the overcurrent protection Io value the lowest when the input voltage Vin is the highest (the highest overcurrent protection Io value is the highest, and the nominal value is 4A)

b. Need to carefully explain the design of the current sampling / overcurrent protection part of the specification, and explain the role of the output POS_OCP and NES_OCP in Figure 27 of the datasheet.

(5). Question five:Auxiliary power supply BUCK voltage related issues

Need to solve the problem as follows

The setting of the auxiliary power reference voltage FB_AUX is related to the SS capacitor. Why is it that when Vss<2V is 1.4V and Vss>2V is 1.0V, what is the point?

  • Hi Darren, an expert will get back to you soon.——Teng

  • Hi Teng Feng

    pls help check it ,we get no feedback from right now,tks!

  • Hi Darren Yang,

    Sorry for the delayed response. I cannot fully understand all of your questions but will try to answer those that are clear for me. Tomorrow I will talk to Teng Feng and try to better understand your other questions:

    Your last question is about FB_AUX, why does the regulation level change when SS pin voltage rises above 2V?

    When operating with SR devices it is important that the duty cycle is high enough for the output voltage before we enable SR devices.

    If not we can discharge the output capacitor back to the input.

    The drop in AUX2 voltage level is a signal from the primary to the secondary circuit that it is time to release the secondary reference soft-start circuit. This ensures that the secondary control loop carries out a soft-start operation and the output voltage rises in a controlled way. 

    Only after the COMP pin starts to increase primary duty cycle the SSSR pin voltage is released to enable operation of the SR switches. In this way the part can start-up with a smooth output voltage even if the output capacitor is already charged before startup.

    Please look at Figure 20 on page 21 of the latest datasheet from ti.com to see the proper startup sequence for this device.

    I cannot properly understand your other questions but will speak to Teng Feng tomorrow to try and understand them better.

    Please can I recommend that you use the Excel calculator tool (available on ti.com) to help with setting your current sense values. The calculation for these resistor values is quite difficult. The Excel calculator tool will also show the expected output current limit set point and show how it varies with input voltage.

    I can help adjust this Excel calculator sheet according to your specification if you wish.

    Thanks

    Joe Leisten (Cork Ireland)

  • Hi 

    thanks,May be because Chinese translation English occur misunderstanding;I also send the chinese description issue to Teng Feng,you can talk with him,tks!

  • Hi Darren Yang,

    Thanks for your patience.

    Can you confirm, based on the supplied component values, that your switching frequency is 140 kHz (each MOSFET). The oscillator frequency is 280 kHz.

    Also could you supply the value of your current sensing (sampling) resistor?

    I will fill out the Excel calculator sheet using your specification to show you the calculated output over-current vs input voltage curve.

    Thanks

    Joe Leisten

  • Hi Darren Yang,

    If you have positive current limit threshold exceeded then LM5036 will enter Cycle By Cycle (CBC) Peak Current Limit - with pulse matching. This means that the low side gate pulse will go low when the sensed current crosses the limit. The duty cycle of the high side gate will then match the low side gate to ensure stable operation. LM5036 will allow Cycle by Cycle Peak current limit operation for a short time (tCBC) which depends upon the external capacitor on the RES pin.

    After tCBC is finished then switching will stop for a period tHIC. This time also depends upon the external capacitor on the RES pin.

    Please look at Figure 29 from the datasheet.

    During tCBC operation the output voltage cannot reach its regulation point because the peak current is too high. In this period the output voltage will depend upon the load resistance and the Peak current limit set point.

    Thanks

    Joe Leisten

  • Hi Joe

    the SCH parameters as attachment,pls help check it,tks!

    Schematic parameters.xlsx

  • Hi Darren,

    I am closing this thread, since we are discussing it by the email.

    Regards,

    Teng